Matt Arsenault f7a171647b GlobalISel: Verify intrinsics ...

I keep using the wrong instruction when manually writing tests. This
really needs to check the number of operands, but I don't see an easy
way to do that right now.

llvm-svn: 363579

2019-06-17 17:01:32 +00:00

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test_copy_mismatch_types.mir

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test_copy.mir

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test_g_add.mir

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test_g_addrspacecast.mir

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test_g_bitcast.mir

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test_g_brjt.mir

[GlobalISel] Add a G_BRJT opcode.

2019-06-14 17:55:48 +00:00

test_g_build_vector_trunc.mir

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test_g_build_vector.mir

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test_g_concat_vectors.mir

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test_g_constant.mir

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test_g_extract.mir

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test_g_fcmp.mir

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test_g_fconstant.mir

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test_g_gep.mir

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test_g_icmp.mir

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test_g_insert.mir

GlobalISel: Verify g_insert

2019-02-19 16:10:16 +00:00

test_g_intrinsic_w_side_effects.mir

GlobalISel: Verify intrinsics

2019-06-17 17:01:32 +00:00

test_g_intrinsic.mir

GlobalISel: Verify intrinsics

2019-06-17 17:01:32 +00:00

test_g_inttoptr.mir

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test_g_jump_table.mir

[GlobalISel] Add a G_JUMP_TABLE opcode.

2019-06-11 19:58:06 +00:00

test_g_load.mir

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test_g_phi.mir

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test_g_ptrtoint.mir

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test_g_select.mir

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test_g_sextload.mir

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test_g_store.mir

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test_g_trunc.mir

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test_g_zextload.mir

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test_phis_precede_nonphis.mir

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verifier-generic-extend-truncate.mir

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verifier-generic-types-1.mir

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verifier-generic-types-2.mir

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verifier-implicit-virtreg-invalid-physreg-liveness.mir

[AMDGPU] Add support for immediate operand for S_ENDPGM

2019-03-12 09:52:58 +00:00

verifier-phi-fail0.mir

[X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand.

2019-04-05 19:28:09 +00:00

verifier-phi.mir

[X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand.

2019-04-05 19:28:09 +00:00

verifier-pseudo-terminators.mir

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verify-regbankselected.mir

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verify-selected.mir

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