mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-10-24 13:33:37 +02:00
594231af66
This should *actually* fix PR30244. This cranks up the workaround for PR30188 so that we never sink loads or stores of allocas. The idea is that these should be removed by SROA/Mem2Reg, and any movement of them may well confuse SROA or just cause unwanted code churn. It's not ideal that the midend should be crippled like this, but that unwanted churn can really cause significant regressions in important workloads (tsan). llvm-svn: 281162
705 lines
15 KiB
LLVM
705 lines
15 KiB
LLVM
; RUN: opt < %s -simplifycfg -S | FileCheck %s
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define zeroext i1 @test1(i1 zeroext %flag, i32 %blksA, i32 %blksB, i32 %nblks) {
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entry:
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br i1 %flag, label %if.then, label %if.else
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; CHECK-LABEL: test1
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; CHECK: add
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; CHECK: select
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; CHECK: icmp
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; CHECK-NOT: br
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if.then:
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%cmp = icmp uge i32 %blksA, %nblks
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%frombool1 = zext i1 %cmp to i8
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br label %if.end
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if.else:
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%add = add i32 %nblks, %blksB
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%cmp2 = icmp ule i32 %add, %blksA
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%frombool3 = zext i1 %cmp2 to i8
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br label %if.end
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if.end:
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%obeys.0 = phi i8 [ %frombool1, %if.then ], [ %frombool3, %if.else ]
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%tobool4 = icmp ne i8 %obeys.0, 0
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ret i1 %tobool4
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}
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define zeroext i1 @test2(i1 zeroext %flag, i32 %blksA, i32 %blksB, i32 %nblks) {
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entry:
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br i1 %flag, label %if.then, label %if.else
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; CHECK-LABEL: test2
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; CHECK: add
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; CHECK: select
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; CHECK: icmp
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; CHECK-NOT: br
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if.then:
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%cmp = icmp uge i32 %blksA, %nblks
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%frombool1 = zext i1 %cmp to i8
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br label %if.end
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if.else:
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%add = add i32 %nblks, %blksB
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%cmp2 = icmp uge i32 %blksA, %add
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%frombool3 = zext i1 %cmp2 to i8
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br label %if.end
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if.end:
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%obeys.0 = phi i8 [ %frombool1, %if.then ], [ %frombool3, %if.else ]
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%tobool4 = icmp ne i8 %obeys.0, 0
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ret i1 %tobool4
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}
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declare i32 @foo(i32, i32) nounwind readnone
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define i32 @test3(i1 zeroext %flag, i32 %x, i32 %y) {
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entry:
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br i1 %flag, label %if.then, label %if.else
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if.then:
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%x0 = call i32 @foo(i32 %x, i32 0) nounwind readnone
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%y0 = call i32 @foo(i32 %x, i32 1) nounwind readnone
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br label %if.end
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if.else:
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%x1 = call i32 @foo(i32 %y, i32 0) nounwind readnone
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%y1 = call i32 @foo(i32 %y, i32 1) nounwind readnone
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br label %if.end
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if.end:
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%xx = phi i32 [ %x0, %if.then ], [ %x1, %if.else ]
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%yy = phi i32 [ %y0, %if.then ], [ %y1, %if.else ]
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%ret = add i32 %xx, %yy
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ret i32 %ret
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}
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; CHECK-LABEL: test3
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; CHECK: select
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; CHECK: call
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; CHECK: call
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; CHECK: add
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; CHECK-NOT: br
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define i32 @test4(i1 zeroext %flag, i32 %x, i32* %y) {
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entry:
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br i1 %flag, label %if.then, label %if.else
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if.then:
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%a = add i32 %x, 5
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store i32 %a, i32* %y
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br label %if.end
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if.else:
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%b = add i32 %x, 7
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store i32 %b, i32* %y
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br label %if.end
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if.end:
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ret i32 1
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}
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; CHECK-LABEL: test4
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; CHECK: select
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; CHECK: store
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; CHECK-NOT: store
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define i32 @test5(i1 zeroext %flag, i32 %x, i32* %y) {
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entry:
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br i1 %flag, label %if.then, label %if.else
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if.then:
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%a = add i32 %x, 5
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store volatile i32 %a, i32* %y
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br label %if.end
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if.else:
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%b = add i32 %x, 7
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store i32 %b, i32* %y
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br label %if.end
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if.end:
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ret i32 1
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}
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; CHECK-LABEL: test5
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; CHECK: store volatile
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; CHECK: store
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define i32 @test6(i1 zeroext %flag, i32 %x, i32* %y) {
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entry:
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br i1 %flag, label %if.then, label %if.else
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if.then:
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%a = add i32 %x, 5
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store volatile i32 %a, i32* %y
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br label %if.end
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if.else:
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%b = add i32 %x, 7
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store volatile i32 %b, i32* %y
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br label %if.end
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if.end:
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ret i32 1
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}
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; CHECK-LABEL: test6
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; CHECK: select
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; CHECK: store volatile
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; CHECK-NOT: store
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define i32 @test7(i1 zeroext %flag, i32 %x, i32* %y) {
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entry:
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br i1 %flag, label %if.then, label %if.else
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if.then:
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%z = load volatile i32, i32* %y
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%a = add i32 %z, 5
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store volatile i32 %a, i32* %y
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br label %if.end
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if.else:
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%w = load volatile i32, i32* %y
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%b = add i32 %w, 7
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store volatile i32 %b, i32* %y
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br label %if.end
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if.end:
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ret i32 1
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}
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; CHECK-LABEL: test7
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; CHECK-DAG: select
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; CHECK-DAG: load volatile
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; CHECK: store volatile
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; CHECK-NOT: load
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; CHECK-NOT: store
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; %z and %w are in different blocks. We shouldn't sink the add because
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; there may be intervening memory instructions.
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define i32 @test8(i1 zeroext %flag, i32 %x, i32* %y) {
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entry:
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%z = load volatile i32, i32* %y
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br i1 %flag, label %if.then, label %if.else
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if.then:
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%a = add i32 %z, 5
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store volatile i32 %a, i32* %y
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br label %if.end
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if.else:
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%w = load volatile i32, i32* %y
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%b = add i32 %w, 7
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store volatile i32 %b, i32* %y
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br label %if.end
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if.end:
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ret i32 1
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}
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; CHECK-LABEL: test8
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; CHECK: add
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; CHECK: add
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; The extra store in %if.then means %z and %w are not equivalent.
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define i32 @test9(i1 zeroext %flag, i32 %x, i32* %y, i32* %p) {
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entry:
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br i1 %flag, label %if.then, label %if.else
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if.then:
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store i32 7, i32* %p
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%z = load volatile i32, i32* %y
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store i32 6, i32* %p
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%a = add i32 %z, 5
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store volatile i32 %a, i32* %y
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br label %if.end
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if.else:
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%w = load volatile i32, i32* %y
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%b = add i32 %w, 7
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store volatile i32 %b, i32* %y
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br label %if.end
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if.end:
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ret i32 1
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}
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; CHECK-LABEL: test9
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; CHECK: add
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; CHECK: add
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%struct.anon = type { i32, i32 }
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; The GEP indexes a struct type so cannot have a variable last index.
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define i32 @test10(i1 zeroext %flag, i32 %x, i32* %y, %struct.anon* %s) {
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entry:
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br i1 %flag, label %if.then, label %if.else
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if.then:
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%dummy = add i32 %x, 5
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%gepa = getelementptr inbounds %struct.anon, %struct.anon* %s, i32 0, i32 0
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store volatile i32 %x, i32* %gepa
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br label %if.end
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if.else:
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%dummy1 = add i32 %x, 6
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%gepb = getelementptr inbounds %struct.anon, %struct.anon* %s, i32 0, i32 1
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store volatile i32 %x, i32* %gepb
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br label %if.end
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if.end:
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ret i32 1
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}
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; CHECK-LABEL: test10
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; CHECK: getelementptr
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; CHECK: getelementptr
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; CHECK: phi
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; CHECK: store volatile
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; The shufflevector's mask operand cannot be merged in a PHI.
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define i32 @test11(i1 zeroext %flag, i32 %w, <2 x i32> %x, <2 x i32> %y) {
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entry:
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br i1 %flag, label %if.then, label %if.else
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if.then:
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%dummy = add i32 %w, 5
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%sv1 = shufflevector <2 x i32> %x, <2 x i32> %y, <2 x i32> <i32 0, i32 1>
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br label %if.end
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if.else:
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%dummy1 = add i32 %w, 6
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%sv2 = shufflevector <2 x i32> %x, <2 x i32> %y, <2 x i32> <i32 1, i32 0>
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br label %if.end
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if.end:
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%p = phi <2 x i32> [ %sv1, %if.then ], [ %sv2, %if.else ]
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ret i32 1
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}
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; CHECK-LABEL: test11
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; CHECK: shufflevector
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; CHECK: shufflevector
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; We can't common an intrinsic!
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define i32 @test12(i1 zeroext %flag, i32 %w, i32 %x, i32 %y) {
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entry:
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br i1 %flag, label %if.then, label %if.else
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if.then:
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%dummy = add i32 %w, 5
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%sv1 = call i32 @llvm.ctlz.i32(i32 %x)
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br label %if.end
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if.else:
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%dummy1 = add i32 %w, 6
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%sv2 = call i32 @llvm.cttz.i32(i32 %x)
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br label %if.end
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if.end:
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%p = phi i32 [ %sv1, %if.then ], [ %sv2, %if.else ]
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ret i32 1
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}
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declare i32 @llvm.ctlz.i32(i32 %x) readnone
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declare i32 @llvm.cttz.i32(i32 %x) readnone
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; CHECK-LABEL: test12
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; CHECK: call i32 @llvm.ctlz
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; CHECK: call i32 @llvm.cttz
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; The TBAA metadata should be properly combined.
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define i32 @test13(i1 zeroext %flag, i32 %x, i32* %y) {
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entry:
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br i1 %flag, label %if.then, label %if.else
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if.then:
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%z = load volatile i32, i32* %y
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%a = add i32 %z, 5
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store volatile i32 %a, i32* %y, !tbaa !3
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br label %if.end
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if.else:
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%w = load volatile i32, i32* %y
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%b = add i32 %w, 7
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store volatile i32 %b, i32* %y, !tbaa !4
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br label %if.end
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if.end:
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ret i32 1
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}
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!0 = !{ !"an example type tree" }
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!1 = !{ !"int", !0 }
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!2 = !{ !"float", !0 }
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!3 = !{ !"const float", !2, i64 0 }
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!4 = !{ !"special float", !2, i64 1 }
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; CHECK-LABEL: test13
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; CHECK-DAG: select
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; CHECK-DAG: load volatile
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; CHECK: store volatile {{.*}}, !tbaa !0
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; CHECK-NOT: load
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; CHECK-NOT: store
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; The call should be commoned.
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define i32 @test13a(i1 zeroext %flag, i32 %w, i32 %x, i32 %y) {
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entry:
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br i1 %flag, label %if.then, label %if.else
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if.then:
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%sv1 = call i32 @bar(i32 %x)
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br label %if.end
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if.else:
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%sv2 = call i32 @bar(i32 %y)
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br label %if.end
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if.end:
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%p = phi i32 [ %sv1, %if.then ], [ %sv2, %if.else ]
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ret i32 1
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}
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declare i32 @bar(i32)
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; CHECK-LABEL: test13a
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; CHECK: %[[x:.*]] = select i1 %flag
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; CHECK: call i32 @bar(i32 %[[x]])
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; The load should be commoned.
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define i32 @test14(i1 zeroext %flag, i32 %w, i32 %x, i32 %y, %struct.anon* %s) {
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entry:
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br i1 %flag, label %if.then, label %if.else
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if.then:
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%dummy = add i32 %x, 1
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%gepa = getelementptr inbounds %struct.anon, %struct.anon* %s, i32 0, i32 1
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%sv1 = load i32, i32* %gepa
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%cmp1 = icmp eq i32 %sv1, 56
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br label %if.end
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if.else:
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%dummy2 = add i32 %x, 4
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%gepb = getelementptr inbounds %struct.anon, %struct.anon* %s, i32 0, i32 1
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%sv2 = load i32, i32* %gepb
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%cmp2 = icmp eq i32 %sv2, 57
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br label %if.end
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if.end:
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%p = phi i1 [ %cmp1, %if.then ], [ %cmp2, %if.else ]
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ret i32 1
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}
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; CHECK-LABEL: test14
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; CHECK: getelementptr
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; CHECK: load
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; CHECK-NOT: load
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; The load should be commoned.
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define i32 @test15(i1 zeroext %flag, i32 %w, i32 %x, i32 %y, %struct.anon* %s) {
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entry:
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br i1 %flag, label %if.then, label %if.else
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if.then:
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%dummy = add i32 %x, 1
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%gepa = getelementptr inbounds %struct.anon, %struct.anon* %s, i32 0, i32 0
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%sv1 = load i32, i32* %gepa
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%ext1 = zext i32 %sv1 to i64
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%cmp1 = icmp eq i64 %ext1, 56
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br label %if.end
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if.else:
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%dummy2 = add i32 %x, 4
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%gepb = getelementptr inbounds %struct.anon, %struct.anon* %s, i32 0, i32 1
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%sv2 = load i32, i32* %gepb
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%ext2 = zext i32 %sv2 to i64
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%cmp2 = icmp eq i64 %ext2, 57
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br label %if.end
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if.end:
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%p = phi i1 [ %cmp1, %if.then ], [ %cmp2, %if.else ]
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ret i32 1
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}
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; CHECK-LABEL: test15
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; CHECK: getelementptr
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; CHECK: load
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; CHECK-NOT: load
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define zeroext i1 @test_crash(i1 zeroext %flag, i32* %i4, i32* %m, i32* %n) {
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entry:
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br i1 %flag, label %if.then, label %if.else
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if.then:
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%tmp1 = load i32, i32* %i4
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%tmp2 = add i32 %tmp1, -1
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store i32 %tmp2, i32* %i4
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br label %if.end
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if.else:
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%tmp3 = load i32, i32* %m
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%tmp4 = load i32, i32* %n
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%tmp5 = add i32 %tmp3, %tmp4
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store i32 %tmp5, i32* %i4
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br label %if.end
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if.end:
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ret i1 true
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}
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; CHECK-LABEL: test_crash
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; No checks for test_crash - just ensure it doesn't crash!
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define zeroext i1 @test16(i1 zeroext %flag, i1 zeroext %flag2, i32 %blksA, i32 %blksB, i32 %nblks) {
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entry:
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br i1 %flag, label %if.then, label %if.else
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if.then:
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%cmp = icmp uge i32 %blksA, %nblks
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%frombool1 = zext i1 %cmp to i8
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br label %if.end
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if.else:
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br i1 %flag2, label %if.then2, label %if.end
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if.then2:
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%add = add i32 %nblks, %blksB
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%cmp2 = icmp ule i32 %add, %blksA
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%frombool3 = zext i1 %cmp2 to i8
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br label %if.end
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if.end:
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%obeys.0 = phi i8 [ %frombool1, %if.then ], [ %frombool3, %if.then2 ], [ 0, %if.else ]
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%tobool4 = icmp ne i8 %obeys.0, 0
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ret i1 %tobool4
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}
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; CHECK-LABEL: test16
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; CHECK: zext
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; CHECK: zext
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define zeroext i1 @test16a(i1 zeroext %flag, i1 zeroext %flag2, i32 %blksA, i32 %blksB, i32 %nblks, i8* %p) {
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entry:
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br i1 %flag, label %if.then, label %if.else
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if.then:
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%cmp = icmp uge i32 %blksA, %nblks
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%frombool1 = zext i1 %cmp to i8
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store i8 %frombool1, i8* %p
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br label %if.end
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if.else:
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br i1 %flag2, label %if.then2, label %if.end
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if.then2:
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%add = add i32 %nblks, %blksB
|
|
%cmp2 = icmp ule i32 %add, %blksA
|
|
%frombool3 = zext i1 %cmp2 to i8
|
|
store i8 %frombool3, i8* %p
|
|
br label %if.end
|
|
|
|
if.end:
|
|
ret i1 true
|
|
}
|
|
|
|
; CHECK-LABEL: test16a
|
|
; CHECK: zext
|
|
; CHECK-NOT: zext
|
|
|
|
define zeroext i1 @test17(i32 %flag, i32 %blksA, i32 %blksB, i32 %nblks) {
|
|
entry:
|
|
switch i32 %flag, label %if.end [
|
|
i32 0, label %if.then
|
|
i32 1, label %if.then2
|
|
]
|
|
|
|
if.then:
|
|
%cmp = icmp uge i32 %blksA, %nblks
|
|
%frombool1 = call i8 @i1toi8(i1 %cmp)
|
|
br label %if.end
|
|
|
|
if.then2:
|
|
%add = add i32 %nblks, %blksB
|
|
%cmp2 = icmp ule i32 %add, %blksA
|
|
%frombool3 = call i8 @i1toi8(i1 %cmp2)
|
|
br label %if.end
|
|
|
|
if.end:
|
|
%obeys.0 = phi i8 [ %frombool1, %if.then ], [ %frombool3, %if.then2 ], [ 0, %entry ]
|
|
%tobool4 = icmp ne i8 %obeys.0, 0
|
|
ret i1 %tobool4
|
|
}
|
|
declare i8 @i1toi8(i1)
|
|
|
|
; CHECK-LABEL: test17
|
|
; CHECK: if.then:
|
|
; CHECK-NEXT: icmp uge
|
|
; CHECK-NEXT: br label %[[x:.*]]
|
|
|
|
; CHECK: if.then2:
|
|
; CHECK-NEXT: add
|
|
; CHECK-NEXT: icmp ule
|
|
; CHECK-NEXT: br label %[[x]]
|
|
|
|
; CHECK: [[x]]:
|
|
; CHECK-NEXT: %[[y:.*]] = phi i1 [ %cmp
|
|
; CHECK-NEXT: %[[z:.*]] = call i8 @i1toi8(i1 %[[y]])
|
|
; CHECK-NEXT: br label %if.end
|
|
|
|
; CHECK: if.end:
|
|
; CHECK-NEXT: phi i8
|
|
; CHECK-DAG: [ %[[z]], %[[x]] ]
|
|
; CHECK-DAG: [ 0, %entry ]
|
|
|
|
define zeroext i1 @test18(i32 %flag, i32 %blksA, i32 %blksB, i32 %nblks) {
|
|
entry:
|
|
switch i32 %flag, label %if.then3 [
|
|
i32 0, label %if.then
|
|
i32 1, label %if.then2
|
|
]
|
|
|
|
if.then:
|
|
%cmp = icmp uge i32 %blksA, %nblks
|
|
%frombool1 = zext i1 %cmp to i8
|
|
br label %if.end
|
|
|
|
if.then2:
|
|
%add = add i32 %nblks, %blksB
|
|
%cmp2 = icmp ule i32 %add, %blksA
|
|
%frombool3 = zext i1 %cmp2 to i8
|
|
br label %if.end
|
|
|
|
if.then3:
|
|
%add2 = add i32 %nblks, %blksA
|
|
%cmp3 = icmp ule i32 %add2, %blksA
|
|
%frombool4 = zext i1 %cmp3 to i8
|
|
br label %if.end
|
|
|
|
if.end:
|
|
%obeys.0 = phi i8 [ %frombool1, %if.then ], [ %frombool3, %if.then2 ], [ %frombool4, %if.then3 ]
|
|
%tobool4 = icmp ne i8 %obeys.0, 0
|
|
ret i1 %tobool4
|
|
}
|
|
|
|
; CHECK-LABEL: test18
|
|
; CHECK: if.end:
|
|
; CHECK-NEXT: %[[x:.*]] = phi i1
|
|
; CHECK-DAG: [ %cmp, %if.then ]
|
|
; CHECK-DAG: [ %cmp2, %if.then2 ]
|
|
; CHECK-DAG: [ %cmp3, %if.then3 ]
|
|
; CHECK-NEXT: zext i1 %[[x]] to i8
|
|
|
|
define i32 @test_pr30188(i1 zeroext %flag, i32 %x) {
|
|
entry:
|
|
%y = alloca i32
|
|
%z = alloca i32
|
|
br i1 %flag, label %if.then, label %if.else
|
|
|
|
if.then:
|
|
store i32 %x, i32* %y
|
|
br label %if.end
|
|
|
|
if.else:
|
|
store i32 %x, i32* %z
|
|
br label %if.end
|
|
|
|
if.end:
|
|
ret i32 1
|
|
}
|
|
|
|
; CHECK-LABEL: test_pr30188
|
|
; CHECK-NOT: select
|
|
; CHECK: store
|
|
; CHECK: store
|
|
|
|
define i32 @test_pr30188a(i1 zeroext %flag, i32 %x) {
|
|
entry:
|
|
%y = alloca i32
|
|
%z = alloca i32
|
|
br i1 %flag, label %if.then, label %if.else
|
|
|
|
if.then:
|
|
call void @g()
|
|
%one = load i32, i32* %y
|
|
%two = add i32 %one, 2
|
|
store i32 %two, i32* %y
|
|
br label %if.end
|
|
|
|
if.else:
|
|
%three = load i32, i32* %z
|
|
%four = add i32 %three, 2
|
|
store i32 %four, i32* %y
|
|
br label %if.end
|
|
|
|
if.end:
|
|
ret i32 1
|
|
}
|
|
|
|
; CHECK-LABEL: test_pr30188a
|
|
; CHECK-NOT: select
|
|
; CHECK: load
|
|
; CHECK: load
|
|
; CHECK: store
|
|
|
|
; The phi is confusing - both add instructions are used by it, but
|
|
; not on their respective unconditional arcs. It should not be
|
|
; optimized.
|
|
define void @test_pr30292(i1 %cond, i1 %cond2, i32 %a, i32 %b) {
|
|
entry:
|
|
%add1 = add i32 %a, 1
|
|
br label %succ
|
|
|
|
one:
|
|
br i1 %cond, label %two, label %succ
|
|
|
|
two:
|
|
call void @g()
|
|
%add2 = add i32 %a, 1
|
|
br label %succ
|
|
|
|
succ:
|
|
%p = phi i32 [ 0, %entry ], [ %add1, %one ], [ %add2, %two ]
|
|
br label %one
|
|
}
|
|
declare void @g()
|
|
|
|
; CHECK-LABEL: test_pr30292
|
|
; CHECK: phi i32 [ 0, %entry ], [ %add1, %succ ], [ %add2, %two ]
|
|
|
|
define zeroext i1 @test_pr30244(i1 zeroext %flag, i1 zeroext %flag2, i32 %blksA, i32 %blksB, i32 %nblks) {
|
|
|
|
entry:
|
|
%p = alloca i8
|
|
br i1 %flag, label %if.then, label %if.else
|
|
|
|
if.then:
|
|
%cmp = icmp uge i32 %blksA, %nblks
|
|
%frombool1 = zext i1 %cmp to i8
|
|
store i8 %frombool1, i8* %p
|
|
br label %if.end
|
|
|
|
if.else:
|
|
br i1 %flag2, label %if.then2, label %if.end
|
|
|
|
if.then2:
|
|
%add = add i32 %nblks, %blksB
|
|
%cmp2 = icmp ule i32 %add, %blksA
|
|
%frombool3 = zext i1 %cmp2 to i8
|
|
store i8 %frombool3, i8* %p
|
|
br label %if.end
|
|
|
|
if.end:
|
|
ret i1 true
|
|
}
|
|
|
|
; CHECK-LABEL: @test_pr30244
|
|
; CHECK: store
|
|
; CHECK: store
|
|
|
|
; CHECK: !0 = !{!1, !1, i64 0}
|
|
; CHECK: !1 = !{!"float", !2}
|
|
; CHECK: !2 = !{!"an example type tree"}
|