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llvm-mirror/test/MC
Akira Hatanaka f8ce377e38 In MipsDisassembler.cpp, instead of defining register class tables, use the ones
that are generated by TableGen and are already available in
MipsGenRegisterInfo.inc. Suggested by Jakob Stoklund Olesen.

Also, fix bug in function DecodeAFGR64RegisterClass.

Patch by Vladimir Medic. 

llvm-svn: 158846
2012-06-20 20:39:23 +00:00
..
ARM Have ARM ELF use correct reloc for "b" instr. 2012-06-19 16:03:02 +00:00
AsmParser Implement irpc. Extracted from a patch by the PaX team. I just added the test. 2012-06-16 18:03:25 +00:00
COFF Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu 2012-03-25 09:02:19 +00:00
Disassembler In MipsDisassembler.cpp, instead of defining register class tables, use the ones 2012-06-20 20:39:23 +00:00
ELF ELF: Add support for the asm .version directive. 2012-05-12 14:30:47 +00:00
MachO Refactor data-in-code annotations. 2012-05-18 19:12:01 +00:00
MBlaze Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu 2012-03-25 09:02:19 +00:00
Mips Make the following changes in MipsAsmPrinter.cpp: 2012-05-12 00:48:43 +00:00
X86 Add intrinsics, code gen, assembler and disassembler support for the SSE4a extrq and insertq instructions. 2012-05-29 19:05:25 +00:00