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0547d81fdb
latency for certain models of the Intel Atom family, by converting instructions into their equivalent LEA instructions, when it is both useful and possible to do so. llvm-svn: 180573
42 lines
1.2 KiB
LLVM
42 lines
1.2 KiB
LLVM
; RUN: llc -march=x86-64 -mcpu=generic -mtriple=x86_64-unknown-linux-gnu -relocation-model=static -asm-verbose=false < %s | FileCheck %s
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; RUN: llc -march=x86-64 -mcpu=atom -mtriple=x86_64-unknown-linux-gnu -relocation-model=static -asm-verbose=false < %s | FileCheck -check-prefix=ATOM %s
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; CHECK: xorl %eax, %eax
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; CHECK: movsd .LCPI0_0(%rip), %xmm0
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; CHECK: align
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; CHECK-NEXT: BB0_2:
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; CHECK-NEXT: movsd A(,%rax,8)
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; CHECK-NEXT: mulsd
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; CHECK-NEXT: movsd
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; CHECK-NEXT: incq %rax
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; ATOM: movsd .LCPI0_0(%rip), %xmm0
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; ATOM: xorl %eax, %eax
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; ATOM: align
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; ATOM-NEXT: BB0_2:
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; ATOM-NEXT: movsd A(,%rax,8)
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; ATOM-NEXT: mulsd
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; ATOM-NEXT: movsd
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; ATOM-NEXT: leaq 1(%rax), %rax
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@A = external global [0 x double]
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define void @foo(i64 %n) nounwind {
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entry:
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%cmp5 = icmp sgt i64 %n, 0
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br i1 %cmp5, label %for.body, label %for.end
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for.body:
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%i.06 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
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%arrayidx = getelementptr [0 x double]* @A, i64 0, i64 %i.06
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%tmp3 = load double* %arrayidx, align 8
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%mul = fmul double %tmp3, 2.300000e+00
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store double %mul, double* %arrayidx, align 8
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%inc = add nsw i64 %i.06, 1
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%exitcond = icmp eq i64 %inc, %n
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br i1 %exitcond, label %for.end, label %for.body
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for.end:
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ret void
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}
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