1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-24 05:23:45 +02:00
llvm-mirror/test/MC
Sam Kolton 68af374543 [AMDGPU] Assembler: SDWA/DPP should not accept scalar registers and immediate operands
Reviewers: artem.tamazov, nhaustov, vpykhtin, tstellarAMD

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, tony-tye

Differential Revision: https://reviews.llvm.org/D28157

llvm-svn: 291668
2017-01-11 11:46:30 +00:00
..
AArch64 Attempt to make the Windows bots green after r290609. 2016-12-27 18:02:27 +00:00
AMDGPU [AMDGPU] Assembler: SDWA/DPP should not accept scalar registers and immediate operands 2017-01-11 11:46:30 +00:00
ARM Drive by typo fix 2017-01-09 21:38:14 +00:00
AsmParser Move test input to directory called Inputs. 2017-01-06 10:22:15 +00:00
AVR [AVR] Add all of the machine code test suite 2016-11-09 23:46:25 +00:00
COFF Emit S_COMPILE3 record once per TU rather than once per function 2016-11-02 21:30:35 +00:00
Disassembler [PowerPC] Implement missing ISA 2.06 instructions. 2017-01-05 15:00:45 +00:00
ELF Speculatively revert r289925, see PR31407 2016-12-16 14:02:28 +00:00
Hexagon [Hexagon] Fix disassembler crash after r279255 2016-09-09 21:45:00 +00:00
Lanai
MachO Speculatively revert r289925, see PR31407 2016-12-16 14:02:28 +00:00
Markup
Mips [mips] For PIC code convert unconditional jump to unconditional branch 2016-12-12 17:40:26 +00:00
PowerPC [PowerPC] Implement missing ISA 2.06 instructions. 2017-01-05 15:00:45 +00:00
Sparc
SystemZ [SystemZ] Support remaining atomic instructions 2016-12-02 18:24:16 +00:00
X86 [X86][AVX2] Passing the appropriate memory operand class to VPMADDWD instruction. 2016-12-22 08:42:46 +00:00