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930aaa18e9
There is not an official documented ABI for frame pointers in Thumb2, but we should try to emit something which is useful. We use r7 as the frame pointer for Thumb code, which currently means that if a function needs to save a high register (r8-r11), it will get pushed to the stack between the frame pointer (r7) and link register (r14). This means that while a stack unwinder can follow the chain of frame pointers up the stack, it cannot know the offset to lr, so does not know which functions correspond to the stack frames. To fix this, we need to push the callee-saved registers in two batches, with the first push saving the low registers, fp and lr, and the second push saving the high registers. This is already implemented, but previously only used for iOS. This patch turns it on for all Thumb2 targets when frame pointers are required by the ABI, and the frame pointer is r7 (Windows uses r11, so this isn't a problem there). If frame pointer elimination is enabled we still emit a single push/pop even if we need a frame pointer for other reasons, to avoid increasing code size. We must also ensure that lr is pushed to the stack when using a frame pointer, so that we end up with a complete frame record. Situations that could cause this were rare, because we already push lr in most situations so that we can return using the pop instruction. Differential Revision: https://reviews.llvm.org/D23516 llvm-svn: 279506
184 lines
5.2 KiB
LLVM
184 lines
5.2 KiB
LLVM
; RUN: llc < %s -mtriple=armv6-apple-ios5.0 -mattr=+vfp2 -arm-atomic-cfg-tidy=0 | FileCheck %s -check-prefix=CHECKV6
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; RUN: llc < %s -mtriple=thumbv7-apple-ios5.0 -arm-atomic-cfg-tidy=0 | FileCheck %s -check-prefix=CHECKT2D
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; RUN: llc < %s -mtriple=armv6-linux-gnueabi -relocation-model=pic -mattr=+vfp2 -arm-atomic-cfg-tidy=0 \
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; RUN: | FileCheck %s -check-prefix=CHECKELF
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; Enable tailcall optimization for iOS 5.0
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; rdar://9120031
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@t = weak global i32 ()* null ; <i32 ()**> [#uses=1]
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declare void @g(i32, i32, i32, i32)
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define void @t1() "no-frame-pointer-elim"="true" {
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; CHECKELF-LABEL: t1:
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; CHECKELF: bl g
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call void @g( i32 1, i32 2, i32 3, i32 4 )
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ret void
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}
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define void @t2() "no-frame-pointer-elim"="true" {
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; CHECKV6-LABEL: t2:
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; CHECKV6: bx r0
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; CHECKT2D-LABEL: t2:
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; CHECKT2D: ldr
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; CHECKT2D-NEXT: ldr
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; CHECKT2D-NEXT: bx r0
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%tmp = load i32 ()*, i32 ()** @t ; <i32 ()*> [#uses=1]
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%tmp.upgrd.2 = tail call i32 %tmp( ) ; <i32> [#uses=0]
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ret void
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}
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define void @t3() "no-frame-pointer-elim"="true" {
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; CHECKV6-LABEL: t3:
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; CHECKV6: b _t2
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; CHECKELF-LABEL: t3:
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; CHECKELF: b t2
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; CHECKT2D-LABEL: t3:
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; CHECKT2D: b.w _t2
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tail call void @t2( ) ; <i32> [#uses=0]
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ret void
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}
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; Sibcall optimization of expanded libcalls. rdar://8707777
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define double @t4(double %a) nounwind readonly ssp "no-frame-pointer-elim"="true" {
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entry:
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; CHECKV6-LABEL: t4:
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; CHECKV6: b _sin
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; CHECKELF-LABEL: t4:
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; CHECKELF: b sin
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%0 = tail call double @sin(double %a) nounwind readonly ; <double> [#uses=1]
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ret double %0
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}
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define float @t5(float %a) nounwind readonly ssp "no-frame-pointer-elim"="true" {
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entry:
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; CHECKV6-LABEL: t5:
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; CHECKV6: b _sinf
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; CHECKELF-LABEL: t5:
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; CHECKELF: b sinf
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%0 = tail call float @sinf(float %a) nounwind readonly ; <float> [#uses=1]
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ret float %0
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}
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declare float @sinf(float) nounwind readonly
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declare double @sin(double) nounwind readonly
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define i32 @t6(i32 %a, i32 %b) nounwind readnone "no-frame-pointer-elim"="true" {
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entry:
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; CHECKV6-LABEL: t6:
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; CHECKV6: b ___divsi3
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; CHECKELF-LABEL: t6:
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; CHECKELF: b __aeabi_idiv
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%0 = sdiv i32 %a, %b
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ret i32 %0
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}
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; Make sure the tail call instruction isn't deleted
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; rdar://8309338
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declare void @foo() nounwind
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define void @t7() nounwind "no-frame-pointer-elim"="true" {
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entry:
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; CHECKT2D-LABEL: t7:
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; CHECKT2D: it ne
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; CHECKT2D-NEXT: bne.w _foo
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; CHECKT2D-NEXT: push
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; CHECKT2D-NEXT: mov r7, sp
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; CHECKT2D-NEXT: bl _foo
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br i1 undef, label %bb, label %bb1.lr.ph
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bb1.lr.ph:
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tail call void @foo() nounwind
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unreachable
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bb:
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tail call void @foo() nounwind
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ret void
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}
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; Make sure codegenprep is duplicating ret instructions to enable tail calls.
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; rdar://11140249
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define i32 @t8(i32 %x) nounwind ssp "no-frame-pointer-elim"="true" {
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entry:
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; CHECKT2D-LABEL: t8:
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; CHECKT2D-NOT: push
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%and = and i32 %x, 1
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%tobool = icmp eq i32 %and, 0
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br i1 %tobool, label %if.end, label %if.then
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if.then: ; preds = %entry
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; CHECKT2D: bne.w _a
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%call = tail call i32 @a(i32 %x) nounwind
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br label %return
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if.end: ; preds = %entry
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%and1 = and i32 %x, 2
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%tobool2 = icmp eq i32 %and1, 0
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br i1 %tobool2, label %if.end5, label %if.then3
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if.then3: ; preds = %if.end
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; CHECKT2D: bne.w _b
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%call4 = tail call i32 @b(i32 %x) nounwind
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br label %return
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if.end5: ; preds = %if.end
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; CHECKT2D: b.w _c
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%call6 = tail call i32 @c(i32 %x) nounwind
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br label %return
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return: ; preds = %if.end5, %if.then3, %if.then
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%retval.0 = phi i32 [ %call, %if.then ], [ %call4, %if.then3 ], [ %call6, %if.end5 ]
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ret i32 %retval.0
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}
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declare i32 @a(i32)
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declare i32 @b(i32)
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declare i32 @c(i32)
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; PR12419
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; rdar://11195178
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; Use the correct input chain for the tailcall node or else the call to
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; _ZN9MutexLockD1Ev would be lost.
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%class.MutexLock = type { i8 }
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@x = external global i32, align 4
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define i32 @t9() nounwind "no-frame-pointer-elim"="true" {
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; CHECKT2D-LABEL: t9:
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; CHECKT2D: bl __ZN9MutexLockC1Ev
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; CHECKT2D: bl __ZN9MutexLockD1Ev
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; CHECKT2D: b.w ___divsi3
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%lock = alloca %class.MutexLock, align 1
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%1 = call %class.MutexLock* @_ZN9MutexLockC1Ev(%class.MutexLock* %lock)
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%2 = load i32, i32* @x, align 4
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%3 = sdiv i32 1000, %2
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%4 = call %class.MutexLock* @_ZN9MutexLockD1Ev(%class.MutexLock* %lock)
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ret i32 %3
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}
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declare %class.MutexLock* @_ZN9MutexLockC1Ev(%class.MutexLock*) unnamed_addr nounwind align 2
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declare %class.MutexLock* @_ZN9MutexLockD1Ev(%class.MutexLock*) unnamed_addr nounwind align 2
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; rdar://13827621
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; Correctly preserve the input chain for the tailcall node in the bitcast case,
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; otherwise the call to floorf is lost.
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define float @libcall_tc_test2(float* nocapture %a, float %b) "no-frame-pointer-elim"="true" {
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; CHECKT2D-LABEL: libcall_tc_test2:
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; CHECKT2D: bl _floorf
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; CHECKT2D: b.w _truncf
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%1 = load float, float* %a, align 4
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%call = tail call float @floorf(float %1)
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store float %call, float* %a, align 4
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%call1 = tail call float @truncf(float %b)
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ret float %call1
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}
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declare float @floorf(float) readnone
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declare float @truncf(float) readnone
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