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llvm-mirror/test/Transforms/PhaseOrdering
Sanjay Patel 5e2f6a06b2 [PhaseOrdering] add test for missed vectorization; NFC (PR43745)
Either SLP or VectorCombine should be able to form vector compares
reliably on this example.
2020-06-23 11:57:32 -04:00
..
X86 [PhaseOrdering] add test for missed vectorization; NFC (PR43745) 2020-06-23 11:57:32 -04:00
2010-03-22-empty-baseclass.ll
basic.ll
bitfield-bittests.ll
gdce.ll
globalaa-retained.ll
inlining-alignment-assumptions.ll [InlineFunction] Disable emission of alignment assumptions by default 2020-04-30 23:12:54 +02:00
interleave-vectorization.ll [PhaseOrdering] add test for vectorizer cooperation; NFC 2020-06-23 08:58:36 -04:00
lifetime-sanitizer.ll
min-max-abs-cse.ll
minmax.ll [InstCombine] add tests for cmyk benchmark; NFC 2020-04-02 13:00:46 -04:00
PR6627.ll
reassociate-after-unroll.ll [InstCombine] (A + B) + B --> A + (B << 1) 2020-05-22 11:46:59 -04:00
rotate.ll
scev-custom-dl.ll
scev.ll
simplifycfg-options.ll
two-shifts-by-sext.ll
unsigned-multiply-overflow-check.ll
vector-trunc.ll [InstCombine] convert bitcast-shuffle to vector trunc 2020-04-05 09:48:02 -04:00