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ab043ff680
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
llvm-svn: 230794
28 lines
881 B
LLVM
28 lines
881 B
LLVM
;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
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; Exactly one constant vector can be folded into dot4, which means exactly
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; 4 MOV instructions
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; CHECK: {{^}}main:
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; CHECK: MOV
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; CHECK: MOV
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; CHECK: MOV
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; CHECK: MOV
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; CHECK-NOT: MOV
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; CHECK-NOT: MOV
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; CHECK-NOT: MOV
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; CHECK-NOT: MOV
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define void @main(float addrspace(1)* %out) {
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main_body:
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%0 = load <4 x float>, <4 x float> addrspace(8)* null
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%1 = load <4 x float>, <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
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%2 = call float @llvm.AMDGPU.dp4(<4 x float> %0,<4 x float> %1)
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%3 = insertelement <4 x float> undef, float %2, i32 0
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call void @llvm.R600.store.swizzle(<4 x float> %3, i32 0, i32 0)
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ret void
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}
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declare float @llvm.AMDGPU.dp4(<4 x float>, <4 x float>) #1
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declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
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attributes #1 = { readnone }
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