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f9d8ca7036
llvm-mirror
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test
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MC
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Disassembler
History
Richard Sandiford
54c1801ee8
[SystemZ] Add MC support for interlocked-access 1 instructions
...
llvm-svn: 197984
2013-12-24 15:14:05 +00:00
..
AArch64
[AArch64 NEON]Fix a assertion failure when disassemble SHLL instruction.
2013-11-29 01:29:16 +00:00
ARM
[ARM] Add support for MVFR2 which is new in ARMv8
2013-11-11 19:56:13 +00:00
Mips
Support for microMIPS trap instruction with immediate operands.
2013-11-13 13:15:03 +00:00
PowerPC
Add a disassembler to the PowerPC backend
2013-12-19 16:13:01 +00:00
SystemZ
[SystemZ] Add MC support for interlocked-access 1 instructions
2013-12-24 15:14:05 +00:00
X86
Add disassembler support for SSE4.1 register/register form of PEXTRW. There is a shorter encoding that was part of SSE2, but a memory form was added in SSE4.1. This is the register form of that encoding.
2013-10-14 01:42:32 +00:00
XCore
[tests] Cleanup initialization of test suffixes.
2013-08-16 00:37:11 +00:00