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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-22 12:33:33 +02:00
llvm-mirror/test/MC
Rafael Espindola fa5cbd5557 Don't use nopl in cpus that don't support it.
Patch by Mikulas Patocka. I added the test. I checked that for cpu names that
gas knows about, it also doesn't generate nopl.

The modified cpus:
i686 - there are i686-class CPUs that don't have nopl: Via c3, Transmeta
        Crusoe, Microsoft VirtualBox - see
        https://bbs.archlinux.org/viewtopic.php?pid=775414
k6, k6-2, k6-3, winchip-c6, winchip2 - these are 586-class CPUs
via c3 c3-2 - see https://bugs.archlinux.org/task/19733 as a proof that
        Via c3 and c3-Nehemiah don't have nopl

llvm-svn: 195679
2013-11-25 20:15:14 +00:00
..
AArch64 Implemented Neon scalar vdup_lane intrinsics. 2013-11-21 08:16:15 +00:00
ARM ARM integrated assembler generates incorrect nop opcode 2013-11-25 19:11:13 +00:00
AsmParser MCParser/Debug info: Accept line number 0 as a legitimate value, since 2013-09-26 23:37:11 +00:00
COFF Fix .comm and .lcomm on COFF. 2013-11-25 16:06:04 +00:00
Disassembler Fixed a bug about disassembling AArch64 post-index load/store single element instructions. 2013-11-25 01:53:26 +00:00
ELF This commit adds some (but not all) of the x86-64 relocations that are not 2013-10-30 18:47:25 +00:00
MachO Add test I forgot to git add in r191824. 2013-10-02 14:49:41 +00:00
Markup MC: Simple example parser for MC assembly markup. 2012-10-31 23:24:13 +00:00
Mips reverts 195057 per request 2013-11-19 20:53:28 +00:00
PowerPC Convert another llc -filetype=obj test. 2013-10-28 22:17:19 +00:00
SystemZ [SystemZ] Add the general form of BCR 2013-11-13 16:57:53 +00:00
X86 Don't use nopl in cpus that don't support it. 2013-11-25 20:15:14 +00:00