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The IR enforced limit for the address space is 24-bits, but LLT was only using 23-bits. Additionally, the argument to the constructor was truncating to 16-bits. A similar problem still exists for the number of vector elements. The IR enforces no limit, so if you try to use a vector with > 65535 elements the IRTranslator asserts in the LLT constructor. llvm-svn: 352264
27 lines
1.2 KiB
LLVM
27 lines
1.2 KiB
LLVM
; RUN: llc -O0 -mtriple=aarch64-apple-ios -global-isel -stop-after=irtranslator %s -o - | FileCheck %s
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; CHECK-LABEL: name: store_max_address_space
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; CHECK: %0:_(p16777215) = COPY $x0
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; CHECK: G_STORE %1(s32), %0(p16777215) :: (store 4 into %ir.ptr, addrspace 16777215)
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define void @store_max_address_space(i32 addrspace(16777215)* %ptr) {
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store i32 0, i32 addrspace(16777215)* %ptr
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ret void
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}
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; CHECK-LABEL: name: store_max_address_space_vector
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; CHECK: %0:_(<2 x p16777215>) = COPY $q0
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; CHECK: %1:_(p16777215) = G_EXTRACT_VECTOR_ELT %0(<2 x p16777215>), %2(s64)
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; CHECK: %1(p16777215) :: (store 4 into %ir.elt0, addrspace 16777215)
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define void @store_max_address_space_vector(<2 x i32 addrspace(16777215)*> %vptr) {
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%elt0 = extractelement <2 x i32 addrspace(16777215)*> %vptr, i32 0
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store i32 0, i32 addrspace(16777215)* %elt0
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ret void
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}
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; CHECK-LABEL: name: max_address_space_vector_max_num_elts
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; CHECK: %0:_(<65535 x p16777215>) = G_LOAD %1(p0) :: (volatile load 524280 from `<65535 x i32 addrspace(16777215)*>* undef`, align 524288)
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define void @max_address_space_vector_max_num_elts() {
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%load = load volatile <65535 x i32 addrspace(16777215)*>, <65535 x i32 addrspace(16777215)*>* undef
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ret void
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}
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