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e010508942
Implement IR intrinsics for stack tagging. Generated code is very unoptimized for now. Two special intrinsics, llvm.aarch64.irg.sp and llvm.aarch64.tagp are used to implement a tagged stack frame pointer in a virtual register. Differential Revision: https://reviews.llvm.org/D64172 llvm-svn: 366360
79 lines
1.9 KiB
LLVM
79 lines
1.9 KiB
LLVM
; RUN: llc < %s -mtriple=aarch64 -mattr=+mte | FileCheck %s
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define void @stgp0(i64 %a, i64 %b, i8* %p) {
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entry:
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; CHECK-LABEL: stgp0:
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; CHECK: stgp x0, x1, [x2]
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; CHECK: ret
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call void @llvm.aarch64.stgp(i8* %p, i64 %a, i64 %b)
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ret void
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}
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define void @stgp1004(i64 %a, i64 %b, i8* %p) {
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entry:
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; CHECK-LABEL: stgp1004:
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; CHECK: add [[R:x[0-9]+]], x2, #1004
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; CHECK: stgp x0, x1, {{\[}}[[R]]{{\]}}
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; CHECK: ret
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%q = getelementptr i8, i8* %p, i32 1004
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call void @llvm.aarch64.stgp(i8* %q, i64 %a, i64 %b)
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ret void
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}
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define void @stgp1008(i64 %a, i64 %b, i8* %p) {
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entry:
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; CHECK-LABEL: stgp1008:
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; CHECK: stgp x0, x1, [x2, #1008]
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; CHECK: ret
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%q = getelementptr i8, i8* %p, i32 1008
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call void @llvm.aarch64.stgp(i8* %q, i64 %a, i64 %b)
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ret void
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}
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define void @stgp1024(i64 %a, i64 %b, i8* %p) {
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entry:
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; CHECK-LABEL: stgp1024:
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; CHECK: add [[R:x[0-9]+]], x2, #1024
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; CHECK: stgp x0, x1, {{\[}}[[R]]{{\]}}
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; CHECK: ret
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%q = getelementptr i8, i8* %p, i32 1024
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call void @llvm.aarch64.stgp(i8* %q, i64 %a, i64 %b)
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ret void
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}
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define void @stgp_1024(i64 %a, i64 %b, i8* %p) {
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entry:
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; CHECK-LABEL: stgp_1024:
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; CHECK: stgp x0, x1, [x2, #-1024]
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; CHECK: ret
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%q = getelementptr i8, i8* %p, i32 -1024
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call void @llvm.aarch64.stgp(i8* %q, i64 %a, i64 %b)
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ret void
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}
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define void @stgp_1040(i64 %a, i64 %b, i8* %p) {
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entry:
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; CHECK-LABEL: stgp_1040:
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; CHECK: sub [[R:x[0-9]+]], x2, #1040
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; CHECK: stgp x0, x1, [x{{.*}}]
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; CHECK: ret
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%q = getelementptr i8, i8* %p, i32 -1040
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call void @llvm.aarch64.stgp(i8* %q, i64 %a, i64 %b)
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ret void
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}
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define void @stgp_alloca(i64 %a, i64 %b) {
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entry:
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; CHECK-LABEL: stgp_alloca:
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; CHECK: stgp x0, x1, [sp]
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; CHECK: stgp x1, x0, [sp, #16]
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; CHECK: ret
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%x = alloca i8, i32 32, align 16
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call void @llvm.aarch64.stgp(i8* %x, i64 %a, i64 %b)
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%x1 = getelementptr i8, i8* %x, i32 16
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call void @llvm.aarch64.stgp(i8* %x1, i64 %b, i64 %a)
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ret void
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}
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declare void @llvm.aarch64.stgp(i8* %p, i64 %a, i64 %b)
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