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8f74f32e3e
Insert these during codegenprepare. This works around a DAG issue where generic combines eliminate the and asserting the high bits are zero, which then exposes an unknown read source to the mul combine. It doesn't worth the hassle of trying to insert an AssertZext or something to try to deal with it. llvm-svn: 366094
15 lines
476 B
LLVM
15 lines
476 B
LLVM
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; GCN-LABEL: {{^}}test_mul_i24:
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; GCN: v_mul_i32_i24
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define amdgpu_kernel void @test_mul_i24(i32 addrspace(1)* %out, i32 %src1, i32 %src2) #1 {
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%val = call i32 @llvm.amdgcn.mul.i24(i32 %src1, i32 %src2) #0
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store i32 %val, i32 addrspace(1)* %out
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ret void
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}
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declare i32 @llvm.amdgcn.mul.i24(i32, i32) #0
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attributes #0 = { nounwind readnone speculatable }
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attributes #1 = { nounwind }
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