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llvm-mirror/test/CodeGen/X86/widen_conv-4.ll
Chris Lattner ad85635a93 now that generic vector types aren't selected onto MMX registers, these
tests don't need -disable-mmx.

llvm-svn: 122188
2010-12-19 20:12:58 +00:00

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295 B
LLVM

; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s
; CHECK: cvtsi2ss
; unsigned to float v7i16 to v7f32
define void @convert(<7 x float>* %dst.addr, <7 x i16> %src) nounwind {
entry:
%val = sitofp <7 x i16> %src to <7 x float>
store <7 x float> %val, <7 x float>* %dst.addr
ret void
}