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fa86e5fee9
This avoids "static initialization order fiasco" Differential Revision: https://reviews.llvm.org/D25412 llvm-svn: 283702
63 lines
1.9 KiB
C++
63 lines
1.9 KiB
C++
//===-- SparcMCTargetDesc.h - Sparc Target Descriptions ---------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file provides Sparc specific target descriptions.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_SPARC_MCTARGETDESC_SPARCMCTARGETDESC_H
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#define LLVM_LIB_TARGET_SPARC_MCTARGETDESC_SPARCMCTARGETDESC_H
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#include "llvm/Support/DataTypes.h"
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namespace llvm {
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class MCAsmBackend;
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class MCCodeEmitter;
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class MCContext;
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class MCInstrInfo;
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class MCObjectWriter;
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class MCRegisterInfo;
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class MCSubtargetInfo;
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class MCTargetOptions;
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class Target;
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class Triple;
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class StringRef;
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class raw_pwrite_stream;
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class raw_ostream;
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Target &getTheSparcTarget();
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Target &getTheSparcV9Target();
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Target &getTheSparcelTarget();
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MCCodeEmitter *createSparcMCCodeEmitter(const MCInstrInfo &MCII,
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const MCRegisterInfo &MRI,
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MCContext &Ctx);
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MCAsmBackend *createSparcAsmBackend(const Target &T, const MCRegisterInfo &MRI,
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const Triple &TT, StringRef CPU,
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const MCTargetOptions &Options);
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MCObjectWriter *createSparcELFObjectWriter(raw_pwrite_stream &OS, bool Is64Bit,
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bool IsLIttleEndian, uint8_t OSABI);
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} // End llvm namespace
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// Defines symbolic names for Sparc registers. This defines a mapping from
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// register name to register number.
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//
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#define GET_REGINFO_ENUM
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#include "SparcGenRegisterInfo.inc"
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// Defines symbolic names for the Sparc instructions.
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//
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#define GET_INSTRINFO_ENUM
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#include "SparcGenInstrInfo.inc"
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#define GET_SUBTARGETINFO_ENUM
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#include "SparcGenSubtargetInfo.inc"
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#endif
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