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a382dbb48f
instead of redefining separate instructions for them. llvm-svn: 175086
36 lines
1.2 KiB
LLVM
36 lines
1.2 KiB
LLVM
; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
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; Check that we generate store instructions with global + offset
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%struct.struc = type { i8, i8, i16, i32 }
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@foo = common global %struct.struc zeroinitializer, align 4
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define void @storeByte(i32 %val1, i32 %val2, i8 zeroext %ival) nounwind {
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; CHECK: memb(##foo{{ *}}+{{ *}}1){{ *}}={{ *}}r{{[0-9]+}}
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entry:
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%cmp = icmp sgt i32 %val1, %val2
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry
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store i8 %ival, i8* getelementptr inbounds (%struct.struc* @foo, i32 0, i32 1), align 1
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br label %if.end
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if.end: ; preds = %if.then, %entry
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ret void
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}
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define void @storeHW(i32 %val1, i32 %val2, i16 signext %ival) nounwind {
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; CHECK: memh(##foo{{ *}}+{{ *}}2){{ *}}={{ *}}r{{[0-9]+}}
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entry:
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%cmp = icmp sgt i32 %val1, %val2
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry
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store i16 %ival, i16* getelementptr inbounds (%struct.struc* @foo, i32 0, i32 2), align 2
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br label %if.end
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if.end: ; preds = %if.then, %entry
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ret void
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}
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