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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 11:13:28 +01:00
llvm-mirror/test/MC
2016-03-02 07:32:43 +00:00
..
AArch64
AMDGPU [TableGen] AsmMatcher: Skip optional operands in the midle of instruction if it is not present 2016-03-01 08:34:43 +00:00
ARM ARM: disallow pc as a base register in Thumb2 memory ops. 2016-02-25 16:54:52 +00:00
AsmParser AsmParser: Fix nested .irp/.irpc 2016-03-01 08:18:28 +00:00
COFF
Disassembler [Power9] Implement new vector compare, extract, insert instructions 2016-03-01 20:51:57 +00:00
ELF
Hexagon [Hexagon] As a size optimization, not lazy extending TPREL or DTPREL variants since they're usually in range. 2016-02-29 21:21:56 +00:00
MachO
Markup
Mips [mips] Range check uimm20 and fixed a bug this revealed. 2016-02-29 16:06:38 +00:00
PowerPC [Power9] Implement new vector compare, extract, insert instructions 2016-03-01 20:51:57 +00:00
Sparc Addition of tests to previous check-in. Tests for coprocessor register usage in Sparc. 2016-02-27 12:52:26 +00:00
SystemZ
X86 [X86] Make X86MCCodeEmitter::DetermineREXPrefix locate operands more like how VEX prefix handling does. 2016-03-02 07:32:43 +00:00