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llvm-mirror/test/CodeGen/X86/fabs.ll
Dan Gohman 5f6f8101d5 Split the Add, Sub, and Mul instruction opcodes into separate
integer and floating-point opcodes, introducing
FAdd, FSub, and FMul.

For now, the AsmParser, BitcodeReader, and IRBuilder all preserve
backwards compatability, and the Core LLVM APIs preserve backwards
compatibility for IR producers. Most front-ends won't need to change
immediately.

This implements the first step of the plan outlined here:
http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt

llvm-svn: 72897
2009-06-04 22:49:04 +00:00

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760 B
LLVM

; Make sure this testcase codegens to the fabs instruction, not a call to fabsf
; RUN: llvm-as < %s | llc -march=x86 -mattr=-sse2,-sse3,-sse | grep fabs\$ | \
; RUN: count 2
; RUN: llvm-as < %s | \
; RUN: llc -march=x86 -mattr=-sse,-sse2,-sse3 -enable-unsafe-fp-math | \
; RUN: grep fabs\$ | count 3
declare float @fabsf(float)
declare x86_fp80 @fabsl(x86_fp80)
define float @test1(float %X) {
%Y = call float @fabsf(float %X)
ret float %Y
}
define double @test2(double %X) {
%Y = fcmp oge double %X, -0.0
%Z = fsub double -0.0, %X
%Q = select i1 %Y, double %X, double %Z
ret double %Q
}
define x86_fp80 @test3(x86_fp80 %X) {
%Y = call x86_fp80 @fabsl(x86_fp80 %X)
ret x86_fp80 %Y
}