RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-26 22:42:46 +02:00
Code Issues Projects Releases Wiki Activity
fb67fff9cb
llvm-mirror/lib/Target/AArch64
History
Juergen Ributzka fb67fff9cb [FastISel][AArch64] Don't bail during simple GEP instruction selection. 
The generic FastISel code would bail, because it can't emit a sign-extend for
AArch64. This copies the code over and uses AArch64 specific emit functions.

This is not ideal and 'computeAddress' should handles this, so it can fold the
address computation into the memory operation.

I plan to clean up 'computeAddress' anyways, so I will add that in a future
commit.

Related to rdar://problem/18962471.

llvm-svn: 221923
2014-11-13 20:50:44 +00:00
..
AsmParser MCAsmParserExtension has a copy of the MCAsmParser. Use it. 2014-11-11 05:18:41 +00:00
Disassembler Pass an ArrayRef to MCDisassembler::getInstruction. 2014-11-12 02:04:27 +00:00
InstPrinter [AArch64] Allow access to all system registers with MRS/MSR instructions. 2014-10-01 10:13:59 +00:00
MCTargetDesc Rename variables to conform to llvm coding standards. 2014-11-03 23:24:10 +00:00
TargetInfo
Utils [AArch64] Allow access to all system registers with MRS/MSR instructions. 2014-10-01 10:13:59 +00:00
AArch64.h [AArch64] Add workaround for Cortex-A53 erratum (835769) 2014-10-13 10:12:35 +00:00
AArch64.td
AArch64A53Fix835769.cpp [AArch64] Fix crash with empty/pseudo-only blocks in A53 erratum (835769) workaround 2014-10-14 14:02:41 +00:00
AArch64A57FPLoadBalancing.cpp Eliminate some deep std::vector copies. NFC. 2014-10-03 18:33:16 +00:00
AArch64AddressTypePromotion.cpp
AArch64AdvSIMDScalarPass.cpp
AArch64AsmPrinter.cpp
AArch64BranchRelaxation.cpp
AArch64CallingConvention.td Teach the AArch64 backend about v4f16 and v8f16 2014-08-27 16:16:04 +00:00
AArch64CleanupLocalDynamicTLSPass.cpp
AArch64CollectLOH.cpp AArch64: use std::fill instead of memset 2014-08-26 03:33:26 +00:00
AArch64ConditionalCompares.cpp Change MCSchedModel to be a struct of statically initialized data. 2014-09-02 17:43:54 +00:00
AArch64ConditionOptimizer.cpp [AArch64] Check Dest Register Liveness in CondOpt pass. 2014-10-31 19:02:38 +00:00
AArch64DeadRegisterDefinitionsPass.cpp Remove 'virtual' keyword from methods markedwith 'override' keyword. 2014-08-30 16:48:34 +00:00
AArch64ExpandPseudoInsts.cpp
AArch64FastISel.cpp [FastISel][AArch64] Don't bail during simple GEP instruction selection. 2014-11-13 20:50:44 +00:00
AArch64FrameLowering.cpp [Stackmaps] Make ithe frame-pointer required for stackmaps. 2014-10-02 22:21:49 +00:00
AArch64FrameLowering.h
AArch64InstrAtomics.td
AArch64InstrFormats.td [AArch64] Allow access to all system registers with MRS/MSR instructions. 2014-10-01 10:13:59 +00:00
AArch64InstrInfo.cpp [AArch64] Keep flags on condition vreg when instantiating a CB branch. 2014-11-07 02:50:00 +00:00
AArch64InstrInfo.h AArch64InstrInfo.h: Fix a warning introduced in clang r220703. [-Winconsistent-missing-override] 2014-10-27 23:29:27 +00:00
AArch64InstrInfo.td AArch64: Pattern match integer vector abs like we do on ARM. 2014-11-04 20:10:06 +00:00
AArch64ISelDAGToDAG.cpp [AArch64]Select wide immediate offset into [Base+XReg] addressing mode 2014-10-14 06:50:36 +00:00
AArch64ISelLowering.cpp This patch changes the ownership of TLOF from TargetLoweringBase to TargetMachine so that different subtargets could share the TLOF effectively 2014-11-13 09:26:31 +00:00
AArch64ISelLowering.h [AArch64] Generate vector signed/unsigned mul and mla/mls long. 2014-10-08 02:31:24 +00:00
AArch64LoadStoreOptimizer.cpp
AArch64MachineCombinerPattern.h
AArch64MachineFunctionInfo.h
AArch64MCInstLower.cpp
AArch64MCInstLower.h
AArch64PBQPRegAlloc.cpp [PBQP] Unique allowed-sets for nodes in the PBQP graph and use pairs of these 2014-10-27 17:44:25 +00:00
AArch64PBQPRegAlloc.h [AArch64] Cleanup A57PBQPConstraints 2014-10-22 12:40:20 +00:00
AArch64PerfectShuffle.h
AArch64PromoteConstant.cpp
AArch64RegisterInfo.cpp
AArch64RegisterInfo.h
AArch64RegisterInfo.td Teach the AArch64 backend about v4f16 and v8f16 2014-08-27 16:16:04 +00:00
AArch64SchedA53.td
AArch64SchedA57.td [AArch64] Enable partial & runtime unrolling on cortex-a57. 2014-10-09 10:13:27 +00:00
AArch64SchedA57WriteRes.td [AArch64] Refines the Cortex-A57 Machine Model 2014-09-29 21:27:36 +00:00
AArch64SchedCyclone.td
AArch64Schedule.td
AArch64SelectionDAGInfo.cpp
AArch64SelectionDAGInfo.h
AArch64StorePairSuppress.cpp Change MCSchedModel to be a struct of statically initialized data. 2014-09-02 17:43:54 +00:00
AArch64Subtarget.cpp Remove redundant calls to isMaterializable. 2014-11-01 16:46:18 +00:00
AArch64Subtarget.h [PBQP] Replace PBQPBuilder with composable constraints (PBQPRAConstraint). 2014-10-09 18:20:51 +00:00
AArch64TargetMachine.cpp This patch changes the ownership of TLOF from TargetLoweringBase to TargetMachine so that different subtargets could share the TLOF effectively 2014-11-13 09:26:31 +00:00
AArch64TargetMachine.h This patch changes the ownership of TLOF from TargetLoweringBase to TargetMachine so that different subtargets could share the TLOF effectively 2014-11-13 09:26:31 +00:00
AArch64TargetObjectFile.cpp
AArch64TargetObjectFile.h
AArch64TargetTransformInfo.cpp [AArch64] Enable partial & runtime unrolling on cortex-a57. 2014-10-09 10:13:27 +00:00
CMakeLists.txt [AArch64] Add workaround for Cortex-A53 erratum (835769) 2014-10-13 10:12:35 +00:00
LLVMBuild.txt
Makefile