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34aca030c5
U test/CodeGen/ARM/tls2.ll U test/CodeGen/ARM/arm-negative-stride.ll U test/CodeGen/ARM/2009-10-30.ll U test/CodeGen/ARM/globals.ll U test/CodeGen/ARM/str_pre-2.ll U test/CodeGen/ARM/ldrd.ll U test/CodeGen/ARM/2009-10-27-double-align.ll U test/CodeGen/Thumb2/thumb2-strb.ll U test/CodeGen/Thumb2/ldr-str-imm12.ll U test/CodeGen/Thumb2/thumb2-strh.ll U test/CodeGen/Thumb2/thumb2-ldr.ll U test/CodeGen/Thumb2/thumb2-str_pre.ll U test/CodeGen/Thumb2/thumb2-str.ll U test/CodeGen/Thumb2/thumb2-ldrh.ll U utils/TableGen/TableGen.cpp U utils/TableGen/DisassemblerEmitter.cpp D utils/TableGen/RISCDisassemblerEmitter.h D utils/TableGen/RISCDisassemblerEmitter.cpp U Makefile.rules U lib/Target/ARM/ARMInstrNEON.td U lib/Target/ARM/Makefile U lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp U lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp U lib/Target/ARM/AsmPrinter/ARMInstPrinter.h D lib/Target/ARM/Disassembler U lib/Target/ARM/ARMInstrFormats.td U lib/Target/ARM/ARMAddressingModes.h U lib/Target/ARM/Thumb2ITBlockPass.cpp llvm-svn: 98640
23 lines
523 B
LLVM
23 lines
523 B
LLVM
; RUN: llc < %s -mtriple=armv6-apple-darwin | FileCheck %s -check-prefix=V6
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; RUN: llc < %s -mtriple=armv5-apple-darwin | FileCheck %s -check-prefix=V5
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; RUN: llc < %s -mtriple=armv6-eabi | FileCheck %s -check-prefix=EABI
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; rdar://r6949835
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@b = external global i64*
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define i64 @t(i64 %a) nounwind readonly {
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entry:
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;V6: ldrd r2, [r2]
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;V5: ldr r3, [r2]
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;V5: ldr r2, [r2, #+4]
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;EABI: ldr r3, [r2]
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;EABI: ldr r2, [r2, #+4]
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%0 = load i64** @b, align 4
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%1 = load i64* %0, align 4
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%2 = mul i64 %1, %a
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ret i64 %2
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}
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