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llvm-mirror/include/llvm/Target
Ulrich Weigand fba10ebb96 Allow target to handle STRICT floating-point nodes
The ISD::STRICT_ nodes used to implement the constrained floating-point
intrinsics are currently never passed to the target back-end, which makes
it impossible to handle them correctly (e.g. mark instructions are depending
on a floating-point status and control register, or mark instructions as
possibly trapping).

This patch allows the target to use setOperationAction to switch the action
on ISD::STRICT_ nodes to Legal. If this is done, the SelectionDAG common code
will stop converting the STRICT nodes to regular floating-point nodes, but
instead pass the STRICT nodes to the target using normal SelectionDAG
matching rules.

To avoid having the back-end duplicate all the floating-point instruction
patterns to handle both strict and non-strict variants, we make the MI
codegen explicitly aware of the floating-point exceptions by introducing
two new concepts:

- A new MCID flag "mayRaiseFPException" that the target should set on any
  instruction that possibly can raise FP exception according to the
  architecture definition.
- A new MI flag FPExcept that CodeGen/SelectionDAG will set on any MI
  instruction resulting from expansion of any constrained FP intrinsic.

Any MI instruction that is *both* marked as mayRaiseFPException *and*
FPExcept then needs to be considered as raising exceptions by MI-level
codegen (e.g. scheduling).

Setting those two new flags is straightforward. The mayRaiseFPException
flag is simply set via TableGen by marking all relevant instruction
patterns in the .td files.

The FPExcept flag is set in SDNodeFlags when creating the STRICT_ nodes
in the SelectionDAG, and gets inherited in the MachineSDNode nodes created
from it during instruction selection. The flag is then transfered to an
MIFlag when creating the MI from the MachineSDNode. This is handled just
like fast-math flags like no-nans are handled today.

This patch includes both common code changes required to implement the
new features, and the SystemZ implementation.

Reviewed By: andrew.w.kaylor

Differential Revision: https://reviews.llvm.org/D55506

llvm-svn: 362663
2019-06-05 22:33:10 +00:00
..
GlobalISel [GlobalISel] Add a G_FNEARBYINT opcode 2019-04-25 16:36:03 +00:00
CodeGenCWrappers.h
GenericOpcodes.td GlobalISel: Define integer min/max instructions 2019-05-17 18:36:31 +00:00
Target.td Allow target to handle STRICT floating-point nodes 2019-06-05 22:33:10 +00:00
TargetCallingConv.td DAG: propagate whether an arg is a pointer for CallingConv decisions. 2019-04-15 12:03:54 +00:00
TargetInstrPredicate.td
TargetIntrinsicInfo.h
TargetItinerary.td
TargetLoweringObjectFile.h [RISCV] Put data smaller than eight bytes to small data section 2019-04-11 04:59:13 +00:00
TargetMachine.h [TargetMachine] error message unsupported code model 2019-05-22 10:40:26 +00:00
TargetOptions.h
TargetPfmCounters.td
TargetSchedule.td Fix typos: (re)?sor?uce -> (re)?source 2019-04-26 05:56:23 +00:00
TargetSelectionDAG.td Allow target to handle STRICT floating-point nodes 2019-06-05 22:33:10 +00:00