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b7d4502f35
Use mask and negate for legalization of i1 source type with SIGN_EXTEND_INREG. With the mask, this should be no worse than 2 shifts. The mask can be eliminated in some cases, so that should be better than 2 shifts. This change exposed some missing folds related to negation: https://reviews.llvm.org/rL284239 https://reviews.llvm.org/rL284395 There may be others, so please let me know if you see any regressions. Differential Revision: https://reviews.llvm.org/D25485 llvm-svn: 284611
26 lines
581 B
LLVM
26 lines
581 B
LLVM
; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s
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; PR30660 - https://llvm.org/bugs/show_bug.cgi?id=30660
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define i32 @select_i32_neg1_or_0(i1 %a) {
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; CHECK-LABEL: select_i32_neg1_or_0:
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; CHECK-NEXT: @ BB#0:
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; CHECK-NEXT: and r0, r0, #1
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; CHECK-NEXT: rsb r0, r0, #0
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; CHECK-NEXT: mov pc, lr
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;
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%b = sext i1 %a to i32
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ret i32 %b
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}
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define i32 @select_i32_neg1_or_0_zeroext(i1 zeroext %a) {
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; CHECK-LABEL: select_i32_neg1_or_0_zeroext:
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; CHECK-NEXT: @ BB#0:
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; CHECK-NEXT: rsb r0, r0, #0
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; CHECK-NEXT: mov pc, lr
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;
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%b = sext i1 %a to i32
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ret i32 %b
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}
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