Vasileios Kalintiris ac58e2a800 [mips] Define patterns for the atomic_{load,store}_{8,16,32,64} nodes. ... Summary: Without these patterns we would generate a complete LL/SC sequence. This would be problematic for memory regions marked as WRITE-only or READ-only, as the instructions LL/SC would read/write to the protected memory regions correspondingly. Reviewers: dsanders Subscribers: llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D14397 llvm-svn: 252293		2015-11-06 12:07:20 +00:00
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add.ll
addrspacecast.ll	[mips] Reserve address spaces 1-255 for software use.	2015-09-08 09:07:03 +00:00
and.ll	Revert r229675 - [mips] Avoid redundant sign extension of the result of binary bitwise instructions.	2015-08-04 14:26:35 +00:00
ashr.ll
atomicrmx.ll	[mips] Define patterns for the atomic_{load,store}_{8,16,32,64} nodes.	2015-11-06 12:07:20 +00:00
call.ll	[mips] Handle undef when extracting subregs from FP64 registers.	2015-10-12 13:55:44 +00:00
extractelement.ll	Fix vector splitting for extract_vector_elt and vector elements of <8-bits.	2015-09-09 09:53:20 +00:00
indirectbr.ll
load-atomic.ll	[mips] Define patterns for the atomic_{load,store}_{8,16,32,64} nodes.	2015-11-06 12:07:20 +00:00
lshr.ll
mul.ll
or.ll	Revert r229675 - [mips] Avoid redundant sign extension of the result of binary bitwise instructions.	2015-08-04 14:26:35 +00:00
ret.ll
sdiv.ll
select.ll
shl.ll
sqrt.ll	[mips][microMIPS] Fix an issue with selecting sqrt instruction in LLVM backend	2015-10-06 15:17:25 +00:00
srem.ll
store-atomic.ll	[mips] Define patterns for the atomic_{load,store}_{8,16,32,64} nodes.	2015-11-06 12:07:20 +00:00
sub.ll
udiv.ll
urem.ll
xor.ll	Revert r229675 - [mips] Avoid redundant sign extension of the result of binary bitwise instructions.	2015-08-04 14:26:35 +00:00