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https://github.com/RPCS3/llvm-mirror.git
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c7f8ab2cc1
Summary: Made it convert from register to stack based instructions, and removed the registers. Fixes to related code that was expecting register based instructions. Added the correct testing flag to all tests, depending on what the format they were expecting so far. Translated one test to stack format as example: reg-stackify-stack.ll tested: llvm-lit -v `find test -name WebAssembly` unittests/MC/* Reviewers: dschuff, sunfish Subscribers: sbc100, jgravelle-google, eraman, aheejin, llvm-commits, jfb Differential Revision: https://reviews.llvm.org/D51241 llvm-svn: 340750
97 lines
2.3 KiB
LLVM
97 lines
2.3 KiB
LLVM
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
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; Test that extending loads are assembled properly.
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target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
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target triple = "wasm32-unknown-unknown"
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; CHECK-LABEL: sext_i8_i32:
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; CHECK: i32.load8_s $push0=, 0($0){{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i32 @sext_i8_i32(i8 *%p) {
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%v = load i8, i8* %p
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%e = sext i8 %v to i32
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ret i32 %e
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}
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; CHECK-LABEL: zext_i8_i32:
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; CHECK: i32.load8_u $push0=, 0($0){{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i32 @zext_i8_i32(i8 *%p) {
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%v = load i8, i8* %p
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%e = zext i8 %v to i32
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ret i32 %e
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}
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; CHECK-LABEL: sext_i16_i32:
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; CHECK: i32.load16_s $push0=, 0($0){{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i32 @sext_i16_i32(i16 *%p) {
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%v = load i16, i16* %p
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%e = sext i16 %v to i32
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ret i32 %e
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}
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; CHECK-LABEL: zext_i16_i32:
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; CHECK: i32.load16_u $push0=, 0($0){{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i32 @zext_i16_i32(i16 *%p) {
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%v = load i16, i16* %p
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%e = zext i16 %v to i32
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ret i32 %e
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}
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; CHECK-LABEL: sext_i8_i64:
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; CHECK: i64.load8_s $push0=, 0($0){{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i64 @sext_i8_i64(i8 *%p) {
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%v = load i8, i8* %p
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%e = sext i8 %v to i64
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ret i64 %e
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}
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; CHECK-LABEL: zext_i8_i64:
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; CHECK: i64.load8_u $push0=, 0($0){{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i64 @zext_i8_i64(i8 *%p) {
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%v = load i8, i8* %p
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%e = zext i8 %v to i64
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ret i64 %e
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}
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; CHECK-LABEL: sext_i16_i64:
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; CHECK: i64.load16_s $push0=, 0($0){{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i64 @sext_i16_i64(i16 *%p) {
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%v = load i16, i16* %p
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%e = sext i16 %v to i64
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ret i64 %e
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}
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; CHECK-LABEL: zext_i16_i64:
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; CHECK: i64.load16_u $push0=, 0($0){{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i64 @zext_i16_i64(i16 *%p) {
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%v = load i16, i16* %p
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%e = zext i16 %v to i64
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ret i64 %e
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}
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; CHECK-LABEL: sext_i32_i64:
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; CHECK: i64.load32_s $push0=, 0($0){{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i64 @sext_i32_i64(i32 *%p) {
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%v = load i32, i32* %p
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%e = sext i32 %v to i64
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ret i64 %e
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}
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; CHECK-LABEL: zext_i32_i64:
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; CHECK: i64.load32_u $push0=, 0($0){{$}}
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; CHECK: return $pop0{{$}}
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define i64 @zext_i32_i64(i32 *%p) {
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%v = load i32, i32* %p
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%e = zext i32 %v to i64
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ret i64 %e
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}
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