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https://github.com/RPCS3/llvm-mirror.git
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ca0f4dc4f0
This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. llvm-svn: 209577
136 lines
4.6 KiB
LLVM
136 lines
4.6 KiB
LLVM
; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=arm64-apple-ios | FileCheck %s --check-prefix=ARM64
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@message = global [80 x i8] c"The LLVM Compiler Infrastructure\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00", align 16
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@temp = common global [80 x i8] zeroinitializer, align 16
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define void @t1() {
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; ARM64-LABEL: t1
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; ARM64: adrp x8, _message@PAGE
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; ARM64: add x0, x8, _message@PAGEOFF
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; ARM64: movz w9, #0
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; ARM64: movz x2, #0x50
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; ARM64: uxtb w1, w9
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; ARM64: bl _memset
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call void @llvm.memset.p0i8.i64(i8* getelementptr inbounds ([80 x i8]* @message, i32 0, i32 0), i8 0, i64 80, i32 16, i1 false)
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ret void
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}
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declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1)
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define void @t2() {
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; ARM64-LABEL: t2
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; ARM64: adrp x8, _temp@GOTPAGE
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; ARM64: ldr x0, [x8, _temp@GOTPAGEOFF]
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; ARM64: adrp x8, _message@PAGE
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; ARM64: add x1, x8, _message@PAGEOFF
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; ARM64: movz x2, #0x50
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; ARM64: bl _memcpy
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* getelementptr inbounds ([80 x i8]* @temp, i32 0, i32 0), i8* getelementptr inbounds ([80 x i8]* @message, i32 0, i32 0), i64 80, i32 16, i1 false)
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ret void
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}
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declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1)
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define void @t3() {
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; ARM64-LABEL: t3
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; ARM64: adrp x8, _temp@GOTPAGE
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; ARM64: ldr x0, [x8, _temp@GOTPAGEOFF]
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; ARM64: adrp x8, _message@PAGE
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; ARM64: add x1, x8, _message@PAGEOFF
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; ARM64: movz x2, #0x14
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; ARM64: bl _memmove
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call void @llvm.memmove.p0i8.p0i8.i64(i8* getelementptr inbounds ([80 x i8]* @temp, i32 0, i32 0), i8* getelementptr inbounds ([80 x i8]* @message, i32 0, i32 0), i64 20, i32 16, i1 false)
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ret void
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}
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declare void @llvm.memmove.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1)
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define void @t4() {
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; ARM64-LABEL: t4
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; ARM64: adrp x8, _temp@GOTPAGE
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; ARM64: ldr x8, [x8, _temp@GOTPAGEOFF]
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; ARM64: adrp x9, _message@PAGE
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; ARM64: add x9, x9, _message@PAGEOFF
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; ARM64: ldr x10, [x9]
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; ARM64: str x10, [x8]
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; ARM64: ldr x10, [x9, #8]
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; ARM64: str x10, [x8, #8]
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; ARM64: ldrb w11, [x9, #16]
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; ARM64: strb w11, [x8, #16]
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; ARM64: ret
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* getelementptr inbounds ([80 x i8]* @temp, i32 0, i32 0), i8* getelementptr inbounds ([80 x i8]* @message, i32 0, i32 0), i64 17, i32 16, i1 false)
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ret void
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}
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define void @t5() {
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; ARM64-LABEL: t5
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; ARM64: adrp x8, _temp@GOTPAGE
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; ARM64: ldr x8, [x8, _temp@GOTPAGEOFF]
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; ARM64: adrp x9, _message@PAGE
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; ARM64: add x9, x9, _message@PAGEOFF
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; ARM64: ldr x10, [x9]
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; ARM64: str x10, [x8]
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; ARM64: ldr x10, [x9, #8]
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; ARM64: str x10, [x8, #8]
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; ARM64: ldrb w11, [x9, #16]
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; ARM64: strb w11, [x8, #16]
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; ARM64: ret
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* getelementptr inbounds ([80 x i8]* @temp, i32 0, i32 0), i8* getelementptr inbounds ([80 x i8]* @message, i32 0, i32 0), i64 17, i32 8, i1 false)
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ret void
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}
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define void @t6() {
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; ARM64-LABEL: t6
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; ARM64: adrp x8, _temp@GOTPAGE
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; ARM64: ldr x8, [x8, _temp@GOTPAGEOFF]
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; ARM64: adrp x9, _message@PAGE
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; ARM64: add x9, x9, _message@PAGEOFF
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; ARM64: ldr w10, [x9]
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; ARM64: str w10, [x8]
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; ARM64: ldr w10, [x9, #4]
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; ARM64: str w10, [x8, #4]
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; ARM64: ldrb w10, [x9, #8]
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; ARM64: strb w10, [x8, #8]
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; ARM64: ret
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* getelementptr inbounds ([80 x i8]* @temp, i32 0, i32 0), i8* getelementptr inbounds ([80 x i8]* @message, i32 0, i32 0), i64 9, i32 4, i1 false)
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ret void
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}
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define void @t7() {
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; ARM64-LABEL: t7
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; ARM64: adrp x8, _temp@GOTPAGE
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; ARM64: ldr x8, [x8, _temp@GOTPAGEOFF]
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; ARM64: adrp x9, _message@PAGE
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; ARM64: add x9, x9, _message@PAGEOFF
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; ARM64: ldrh w10, [x9]
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; ARM64: strh w10, [x8]
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; ARM64: ldrh w10, [x9, #2]
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; ARM64: strh w10, [x8, #2]
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; ARM64: ldrh w10, [x9, #4]
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; ARM64: strh w10, [x8, #4]
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; ARM64: ldrb w10, [x9, #6]
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; ARM64: strb w10, [x8, #6]
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; ARM64: ret
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* getelementptr inbounds ([80 x i8]* @temp, i32 0, i32 0), i8* getelementptr inbounds ([80 x i8]* @message, i32 0, i32 0), i64 7, i32 2, i1 false)
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ret void
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}
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define void @t8() {
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; ARM64-LABEL: t8
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; ARM64: adrp x8, _temp@GOTPAGE
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; ARM64: ldr x8, [x8, _temp@GOTPAGEOFF]
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; ARM64: adrp x9, _message@PAGE
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; ARM64: add x9, x9, _message@PAGEOFF
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; ARM64: ldrb w10, [x9]
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; ARM64: strb w10, [x8]
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; ARM64: ldrb w10, [x9, #1]
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; ARM64: strb w10, [x8, #1]
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; ARM64: ldrb w10, [x9, #2]
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; ARM64: strb w10, [x8, #2]
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; ARM64: ldrb w10, [x9, #3]
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; ARM64: strb w10, [x8, #3]
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; ARM64: ret
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* getelementptr inbounds ([80 x i8]* @temp, i32 0, i32 0), i8* getelementptr inbounds ([80 x i8]* @message, i32 0, i32 0), i64 4, i32 1, i1 false)
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ret void
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}
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