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75eff6e3b0
Some instructions have a fixed Z register and don't have an explicit register operand. This can be worked around by simply printing the operand directly if the particular register class is detected. The LPM and ELPM instructions also needed a custom decoder, which is also included in this patch. Differential Revision: https://reviews.llvm.org/D82088
33 lines
773 B
ArmAsm
33 lines
773 B
ArmAsm
; RUN: llvm-mc -triple avr -mattr=lpm,lpmx -show-encoding < %s | FileCheck %s
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; RUN: llvm-mc -filetype=obj -triple avr -mattr=lpm,lpmx < %s | llvm-objdump -d --mattr=lpm,lpmx - | FileCheck -check-prefix=CHECK-INST %s
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foo:
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lpm
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lpm r3, Z
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lpm r23, Z
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lpm r8, Z+
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lpm r0, Z+
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lpm r31, Z+
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; CHECK: lpm ; encoding: [0xc8,0x95]
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; CHECK: lpm r3, Z ; encoding: [0x34,0x90]
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; CHECK: lpm r23, Z ; encoding: [0x74,0x91]
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; CHECK: lpm r8, Z+ ; encoding: [0x85,0x90]
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; CHECK: lpm r0, Z+ ; encoding: [0x05,0x90]
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; CHECK: lpm r31, Z+ ; encoding: [0xf5,0x91]
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; CHECK-INST: lpm
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; CHECK-INST: lpm r3, Z
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; CHECK-INST: lpm r23, Z
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; CHECK-INST: lpm r8, Z+
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; CHECK-INST: lpm r0, Z+
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; CHECK-INST: lpm r31, Z+
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