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482cfa14e2
Add disassembly support for the movw, adiw, and sbiw instructions. I had previously committed test cases for the adiw and sbiw instructions, but had accidentally made them not runnable so they were skipped all this time. Oops. This patch fixes that by adding support for disassembling those instructions. Differential Revision: https://reviews.llvm.org/D82093
33 lines
1017 B
ArmAsm
33 lines
1017 B
ArmAsm
; RUN: llvm-mc -triple avr -mattr=movw -show-encoding < %s | FileCheck %s
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; RUN: llvm-mc -filetype=obj -triple avr -mattr=movw < %s | llvm-objdump -d --mattr=movw - | FileCheck -check-prefix=CHECK-INST %s
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foo:
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movw r10, r8
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movw r12, r16
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movw r20, r22
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movw r8, r12
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movw r0, r0
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movw r0, r30
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movw r30, r30
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movw r30, r0
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; CHECK: movw r10, r8 ; encoding: [0x54,0x01]
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; CHECK: movw r12, r16 ; encoding: [0x68,0x01]
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; CHECK: movw r20, r22 ; encoding: [0xab,0x01]
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; CHECK: movw r8, r12 ; encoding: [0x46,0x01]
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; CHECK: movw r0, r0 ; encoding: [0x00,0x01]
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; CHECK: movw r0, r30 ; encoding: [0x0f,0x01]
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; CHECK: movw r30, r30 ; encoding: [0xff,0x01]
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; CHECK: movw r30, r0 ; encoding: [0xf0,0x01]
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; CHECK-INST: movw r10, r8
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; CHECK-INST: movw r12, r16
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; CHECK-INST: movw r20, r22
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; CHECK-INST: movw r8, r12
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; CHECK-INST: movw r0, r0
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; CHECK-INST: movw r0, r30
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; CHECK-INST: movw r30, r30
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; CHECK-INST: movw r30, r0
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