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llvm-mirror/test/MC/AVR/inst-swap.s
Ayke van Laethem 81a28f0089 [AVR] Decode single register instructions
This is a set of instructions that take just a single register as an
operand, with no immediates. Because all instructions share the same
format, I haven't added exhaustive bit testing to all instructions but
just to the inc instruction.

Differential Revision: https://reviews.llvm.org/D81968
2020-06-23 02:17:15 +02:00

21 lines
538 B
ArmAsm

; RUN: llvm-mc -triple avr -show-encoding < %s | FileCheck %s
; RUN: llvm-mc -filetype=obj -triple avr < %s | llvm-objdump -d - | FileCheck -check-prefix=CHECK-INST %s
foo:
swap r31
swap r25
swap r5
swap r0
; CHECK: swap r31 ; encoding: [0xf2,0x95]
; CHECK: swap r25 ; encoding: [0x92,0x95]
; CHECK: swap r5 ; encoding: [0x52,0x94]
; CHECK: swap r0 ; encoding: [0x02,0x94]
; CHECK-INST: swap r31
; CHECK-INST: swap r25
; CHECK-INST: swap r5
; CHECK-INST: swap r0