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ca0f4dc4f0
This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. llvm-svn: 209577
39 lines
2.1 KiB
ArmAsm
39 lines
2.1 KiB
ArmAsm
// RUN: llvm-mc -triple=arm64-linux-gnu -show-encoding -o - %s | FileCheck %s
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// RUN: llvm-mc -triple=arm64-linux-gnu -show-encoding -filetype=obj -o - %s | llvm-objdump -r - | FileCheck --check-prefix=CHECK-OBJ %s
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movz x2, #:abs_g0:sym
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movk w3, #:abs_g0_nc:sym
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// CHECK: movz x2, #:abs_g0:sym // encoding: [0bAAA00010,A,0b100AAAAA,0xd2]
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// CHECK-NEXT: // fixup A - offset: 0, value: :abs_g0:sym, kind: fixup_aarch64_movw
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// CHECK: movk w3, #:abs_g0_nc:sym // encoding: [0bAAA00011,A,0b100AAAAA,0x72]
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// CHECK-NEXT: // fixup A - offset: 0, value: :abs_g0_nc:sym, kind: fixup_aarch64_movw
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// CHECK-OBJ: 0 R_AARCH64_MOVW_UABS_G0 sym
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// CHECK-OBJ: 4 R_AARCH64_MOVW_UABS_G0_NC sym
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movz x4, #:abs_g1:sym
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movk w5, #:abs_g1_nc:sym
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// CHECK: movz x4, #:abs_g1:sym // encoding: [0bAAA00100,A,0b101AAAAA,0xd2]
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// CHECK-NEXT: // fixup A - offset: 0, value: :abs_g1:sym, kind: fixup_aarch64_movw
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// CHECK: movk w5, #:abs_g1_nc:sym // encoding: [0bAAA00101,A,0b101AAAAA,0x72]
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// CHECK-NEXT: // fixup A - offset: 0, value: :abs_g1_nc:sym, kind: fixup_aarch64_movw
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// CHECK-OBJ: 8 R_AARCH64_MOVW_UABS_G1 sym
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// CHECK-OBJ: c R_AARCH64_MOVW_UABS_G1_NC sym
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movz x6, #:abs_g2:sym
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movk x7, #:abs_g2_nc:sym
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// CHECK: movz x6, #:abs_g2:sym // encoding: [0bAAA00110,A,0b110AAAAA,0xd2]
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// CHECK-NEXT: // fixup A - offset: 0, value: :abs_g2:sym, kind: fixup_aarch64_movw
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// CHECK: movk x7, #:abs_g2_nc:sym // encoding: [0bAAA00111,A,0b110AAAAA,0xf2]
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// CHECK-NEXT: // fixup A - offset: 0, value: :abs_g2_nc:sym, kind: fixup_aarch64_movw
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// CHECK-OBJ: 10 R_AARCH64_MOVW_UABS_G2 sym
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// CHECK-OBJ: 14 R_AARCH64_MOVW_UABS_G2_NC sym
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movz x8, #:abs_g3:sym
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// CHECK: movz x8, #:abs_g3:sym // encoding: [0bAAA01000,A,0b111AAAAA,0xd2]
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// CHECK-NEXT: // fixup A - offset: 0, value: :abs_g3:sym, kind: fixup_aarch64_movw
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// CHECK-OBJ: 18 R_AARCH64_MOVW_UABS_G3 sym
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