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llvm-mirror/test/DebugInfo/MIR/ARM/live-debug-values-reg-copy.mir
Sjoerd Meijer bbf5be9d55 [MIR][ARM] MachineOperand comments
This adds infrastructure to print and parse MIR MachineOperand comments.
The motivation for the ARM backend is to print condition code names instead of
magic constants that are difficult to read (for human beings). For example,
instead of this:

  dead renamable $r2, $cpsr = tEOR killed renamable $r2, renamable $r1, 14, $noreg
  t2Bcc %bb.4, 0, killed $cpsr

we now print this:

  dead renamable $r2, $cpsr = tEOR killed renamable $r2, renamable $r1, 14 /* CC::always */, $noreg
  t2Bcc %bb.4, 0 /* CC:eq */, killed $cpsr

This shows that MachineOperand comments are enclosed between /* and */. In this
example, the EOR instruction is not conditionally executed (i.e. it is "always
executed"), which is encoded by the 14 immediate machine operand. Thus, now
this machine operand has /* CC::always */ as a comment. The 0 on the next
conditional branch instruction represents the equal condition code, thus now
this operand has /* CC:eq */ as a comment.

As it is a comment, the MI lexer/parser completely ignores it. The benefit is
that this keeps the change in the lexer extremely minimal and no target
specific parsing needs to be done. The changes on the MIPrinter side are also
minimal, as there is only one target hooks that is used to create the machine
operand comments.

Differential Revision: https://reviews.llvm.org/D74306
2020-02-24 14:19:21 +00:00

148 lines
6.8 KiB
YAML

# RUN: llc -run-pass=livedebugvalues %s -o - | FileCheck %s
#
# This test tests tracking variables value transferring from one register to another.
# This example is altered additionally in order to test transferring from one float register
# to another. The altered instructions are labeled below.
#
# CHECK: ![[ARG1:.*]] = !DILocalVariable(name: "arg1"
# CHECK: DBG_VALUE $r4, $noreg, ![[ARG1]], !DIExpression(), debug-location
# CHECK: $r5 = MOVr killed $r4, 14 /* CC::al */, $noreg, $noreg, debug-location
# CHECK-NEXT: DBG_VALUE $r5, $noreg, ![[ARG1]], !DIExpression(), debug-location
--- |
; ModuleID = 'live-debug-values-reg-copy.ll'
source_filename = "live-debug-values-reg-copy.c"
target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
target triple = "armv4t--"
define dso_local arm_aapcscc i32 @foo(i32 %arg1) local_unnamed_addr !dbg !8 {
entry:
call void @llvm.dbg.value(metadata i32 %arg1, metadata !13, metadata !DIExpression()), !dbg !16
%cmp = icmp sgt i32 %arg1, 10, !dbg !16
br i1 %cmp, label %if.end, label %if.else, !dbg !16
if.else: ; preds = %entry
%add5 = add nsw i32 %arg1, 10, !dbg !16
call void @llvm.dbg.value(metadata i32 %add5, metadata !13, metadata !DIExpression()), !dbg !16
%call6 = tail call arm_aapcscc i32 @externFunc2(i32 %add5), !dbg !16
%call8 = tail call arm_aapcscc i32 @externFunc(i32 %add5), !dbg !16
ret i32 %call6, !dbg !16
if.end: ; preds = %entry
%call = tail call arm_aapcscc i32 @externFunc(i32 %arg1), !dbg !16
ret i32 1, !dbg !16
}
declare dso_local arm_aapcscc i32 @externFunc(i32) local_unnamed_addr
declare dso_local arm_aapcscc i32 @externFunc2(i32) local_unnamed_addr
; Function Attrs: nounwind readnone speculatable
declare void @llvm.dbg.value(metadata, metadata, metadata) #0
; Function Attrs: nounwind
declare void @llvm.stackprotector(i8*, i8**) #1
attributes #0 = { nounwind readnone speculatable }
attributes #1 = { nounwind }
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!3, !4, !5, !6}
!llvm.ident = !{!7}
!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 7.0.0 ", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2)
!1 = !DIFile(filename: "live-debug-values-reg-copy.c", directory: "/")
!2 = !{}
!3 = !{i32 2, !"Dwarf Version", i32 4}
!4 = !{i32 2, !"Debug Info Version", i32 3}
!5 = !{i32 1, !"wchar_size", i32 4}
!6 = !{i32 1, !"min_enum_size", i32 4}
!7 = !{!"clang version 7.0.0"}
!8 = distinct !DISubprogram(name: "foo", scope: !1, file: !1, line: 4, type: !9, isLocal: false, isDefinition: true, scopeLine: 4, flags: DIFlagPrototyped, isOptimized: true, unit: !0, retainedNodes: !12)
!9 = !DISubroutineType(types: !10)
!10 = !{!11, !11}
!11 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
!12 = !{!13}
!13 = !DILocalVariable(name: "arg1", arg: 1, scope: !8, file: !1, line: 4, type: !11)
!16 = !DILocation(line: 4, column: 13, scope: !8)
...
---
name: foo
alignment: 4
exposesReturnsTwice: false
legalized: false
regBankSelected: false
selected: false
tracksRegLiveness: false
registers:
liveins:
- { reg: '$r0', virtual-reg: '' }
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
hasStackMap: false
hasPatchPoint: false
stackSize: 16
offsetAdjustment: 0
maxAlignment: 4
adjustsStack: true
hasCalls: true
stackProtector: ''
maxCallFrameSize: 0
hasOpaqueSPAdjustment: false
hasVAStart: false
hasMustTailInVarArgFunc: false
savePoint: ''
restorePoint: ''
fixedStack:
stack:
- { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
stack-id: default, callee-saved-register: '$r11', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 2, name: '', type: spill-slot, offset: -12, size: 4, alignment: 4,
stack-id: default, callee-saved-register: '$r5', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 3, name: '', type: spill-slot, offset: -16, size: 4, alignment: 4,
stack-id: default, callee-saved-register: '$r4', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
constants:
body: |
bb.0.entry:
successors: %bb.1(0x40000000), %bb.2(0x40000000)
$sp = frame-setup STMDB_UPD $sp, 14, $noreg, killed $r4, killed $r5, killed $r11, killed $lr
frame-setup CFI_INSTRUCTION def_cfa_offset 16
frame-setup CFI_INSTRUCTION offset $lr, -4
frame-setup CFI_INSTRUCTION offset $r11, -8
frame-setup CFI_INSTRUCTION offset $r5, -12
frame-setup CFI_INSTRUCTION offset $r4, -16
DBG_VALUE $r0, $noreg, !13, !DIExpression(), debug-location !16
DBG_VALUE $r0, $noreg, !13, !DIExpression(), debug-location !16
CMPri renamable $r0, 10, 14, $noreg, implicit-def $cpsr, debug-location !16
Bcc %bb.2, 13, killed $cpsr, debug-location !16
bb.1.if.end:
BL @externFunc, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $r0, implicit-def $sp, implicit-def dead $r0, debug-location !16
$r0 = MOVi 1, 14, $noreg, $noreg, debug-location !16
$sp = LDMIA_UPD $sp, 14, $noreg, def $r4, def $r5, def $r11, def $lr, debug-location !16
BX_RET 14, $noreg, implicit killed $r0, debug-location !16
bb.2.if.else:
renamable $r4 = ADDri killed renamable $r0, 10, 14, $noreg, $noreg, debug-location !16
DBG_VALUE $r4, $noreg, !13, !DIExpression(), debug-location !16
$r0 = MOVr $r4, 14, $noreg, $noreg, debug-location !16
BL @externFunc2, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $r0, implicit-def $sp, implicit-def $r0, debug-location !16
$r5 = MOVr killed $r0, 14, $noreg, $noreg, debug-location !16
$r0 = MOVr $r4, 14, $noreg, $noreg, debug-location !16
BL @externFunc, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $r0, implicit-def $sp, implicit-def dead $r0, debug-location !16
$r0 = MOVr killed $r5, 14, $noreg, $noreg, debug-location !16
; Instruction below is added in order to test moving variable's value from one register to another.
$r5 = MOVr killed $r4, 14, $noreg, $noreg, debug-location !16
$sp = LDMIA_UPD $sp, 14, $noreg, def $r4, def $r5, def $r11, def $lr, debug-location !16
BX_RET 14, $noreg, implicit killed $r0, debug-location !16
...