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llvm-mirror/test/CodeGen
Matt Arsenault fca6ba66d2 GlobalISel: Avoid use of G_INSERT in insertParts
G_INSERT legalization is incomplete and doesn't work very
well. Instead try to use sequences of G_MERGE_VALUES/G_UNMERGE_VALUES
padding with undef values (although this can get pretty large).

For the case of load/store narrowing, this is still performing the
load/stores in irregularly sized pieces. It might be cleaner to split
this down into equal sized pieces, and rely on load/store merging to
optimize it.
2021-06-08 14:44:24 -04:00
..
AArch64 GlobalISel: Avoid use of G_INSERT in insertParts 2021-06-08 14:44:24 -04:00
AMDGPU GlobalISel: Avoid use of G_INSERT in insertParts 2021-06-08 14:44:24 -04:00
ARC
ARM
AVR
BPF
Generic reland [IR] make -stack-alignment= into a module attr 2021-06-08 10:59:46 -07:00
Hexagon
Inputs
Lanai
M68k
Mips reland [IR] make -stack-alignment= into a module attr 2021-06-08 10:59:46 -07:00
MIR
MSP430
NVPTX
PowerPC
RISCV [RISCV] Remove dead code from fixed-vectors-abs.ll test cases. NFC 2021-06-08 11:24:23 -07:00
SPARC
SystemZ
Thumb
Thumb2 [ARM] A couple of extra VMOVimm tests, useful for showing BE codegen. NFC 2021-06-08 19:39:45 +01:00
VE
WebAssembly
WinCFGuard
WinEH
X86 reland [IR] make -stack-alignment= into a module attr 2021-06-08 10:59:46 -07:00
XCore