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Userspace page aliasing allows us to use middle pointer bits for tags without untagging them before syscalls or accesses. This should enable easier experimentation with HWASan on x86_64 platforms. Currently stack, global, and secondary heap tagging are unsupported. Only primary heap allocations get tagged. Note that aliasing mode will not work properly in the presence of fork(), since heap memory will be shared between the parent and child processes. This mode is non-ideal; we expect Intel LAM to enable full HWASan support on x86_64 in the future. Reviewed By: vitalybuka, eugenis Differential Revision: https://reviews.llvm.org/D98875
35 lines
927 B
LLVM
35 lines
927 B
LLVM
; Test basic address sanitizer instrumentation.
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;
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; RUN: opt < %s -hwasan -S | FileCheck %s
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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define void @atomicrmw(i64* %ptr) sanitize_hwaddress {
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; CHECK-LABEL: @atomicrmw(
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; CHECK: %[[A:[^ ]*]] = ptrtoint i64* %ptr to i64
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; CHECK: call void @__hwasan_store8(i64 %[[A]])
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; CHECK: atomicrmw add i64* %ptr, i64 1 seq_cst
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; CHECK: ret void
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entry:
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%0 = atomicrmw add i64* %ptr, i64 1 seq_cst
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ret void
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}
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define void @cmpxchg(i64* %ptr, i64 %compare_to, i64 %new_value) sanitize_hwaddress {
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; CHECK-LABEL: @cmpxchg(
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; CHECK: %[[A:[^ ]*]] = ptrtoint i64* %ptr to i64
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; CHECK: call void @__hwasan_store8(i64 %[[A]])
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; CHECK: cmpxchg i64* %ptr, i64 %compare_to, i64 %new_value seq_cst seq_cst
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; CHECK: ret void
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entry:
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%0 = cmpxchg i64* %ptr, i64 %compare_to, i64 %new_value seq_cst seq_cst
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ret void
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}
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