mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-10-23 13:02:52 +02:00
fd49f275f8
This patch implements a optimization bisect feature, which will allow optimizations to be selectively disabled at compile time in order to track down test failures that are caused by incorrect optimizations. The bisection is enabled using a new command line option (-opt-bisect-limit). Individual passes that may be skipped call the OptBisect object (via an LLVMContext) to see if they should be skipped based on the bisect limit. A finer level of control (disabling individual transformations) can be managed through an addition OptBisect method, but this is not yet used. The skip checking in this implementation is based on (and replaces) the skipOptnoneFunction check. Where that check was being called, a new call has been inserted in its place which checks the bisect limit and the optnone attribute. A new function call has been added for module and SCC passes that behaves in a similar way. Differential Revision: http://reviews.llvm.org/D19172 llvm-svn: 267022
100 lines
3.2 KiB
C++
100 lines
3.2 KiB
C++
//===- Mem2Reg.cpp - The -mem2reg pass, a wrapper around the Utils lib ----===//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
//
|
|
// This pass is a simple pass wrapper around the PromoteMemToReg function call
|
|
// exposed by the Utils library.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#include "llvm/Transforms/Scalar.h"
|
|
#include "llvm/ADT/Statistic.h"
|
|
#include "llvm/Analysis/AssumptionCache.h"
|
|
#include "llvm/IR/Dominators.h"
|
|
#include "llvm/IR/Function.h"
|
|
#include "llvm/IR/Instructions.h"
|
|
#include "llvm/Transforms/Utils/PromoteMemToReg.h"
|
|
#include "llvm/Transforms/Utils/UnifyFunctionExitNodes.h"
|
|
using namespace llvm;
|
|
|
|
#define DEBUG_TYPE "mem2reg"
|
|
|
|
STATISTIC(NumPromoted, "Number of alloca's promoted");
|
|
|
|
namespace {
|
|
struct PromotePass : public FunctionPass {
|
|
static char ID; // Pass identification, replacement for typeid
|
|
PromotePass() : FunctionPass(ID) {
|
|
initializePromotePassPass(*PassRegistry::getPassRegistry());
|
|
}
|
|
|
|
// runOnFunction - To run this pass, first we calculate the alloca
|
|
// instructions that are safe for promotion, then we promote each one.
|
|
//
|
|
bool runOnFunction(Function &F) override;
|
|
|
|
void getAnalysisUsage(AnalysisUsage &AU) const override {
|
|
AU.addRequired<AssumptionCacheTracker>();
|
|
AU.addRequired<DominatorTreeWrapperPass>();
|
|
AU.setPreservesCFG();
|
|
// This is a cluster of orthogonal Transforms
|
|
AU.addPreserved<UnifyFunctionExitNodes>();
|
|
AU.addPreservedID(LowerSwitchID);
|
|
AU.addPreservedID(LowerInvokePassID);
|
|
}
|
|
};
|
|
} // end of anonymous namespace
|
|
|
|
char PromotePass::ID = 0;
|
|
INITIALIZE_PASS_BEGIN(PromotePass, "mem2reg", "Promote Memory to Register",
|
|
false, false)
|
|
INITIALIZE_PASS_DEPENDENCY(AssumptionCacheTracker)
|
|
INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
|
|
INITIALIZE_PASS_END(PromotePass, "mem2reg", "Promote Memory to Register",
|
|
false, false)
|
|
|
|
bool PromotePass::runOnFunction(Function &F) {
|
|
if (skipFunction(F))
|
|
return false;
|
|
|
|
std::vector<AllocaInst*> Allocas;
|
|
|
|
BasicBlock &BB = F.getEntryBlock(); // Get the entry node for the function
|
|
|
|
bool Changed = false;
|
|
|
|
DominatorTree &DT = getAnalysis<DominatorTreeWrapperPass>().getDomTree();
|
|
AssumptionCache &AC =
|
|
getAnalysis<AssumptionCacheTracker>().getAssumptionCache(F);
|
|
|
|
while (1) {
|
|
Allocas.clear();
|
|
|
|
// Find allocas that are safe to promote, by looking at all instructions in
|
|
// the entry node
|
|
for (BasicBlock::iterator I = BB.begin(), E = --BB.end(); I != E; ++I)
|
|
if (AllocaInst *AI = dyn_cast<AllocaInst>(I)) // Is it an alloca?
|
|
if (isAllocaPromotable(AI))
|
|
Allocas.push_back(AI);
|
|
|
|
if (Allocas.empty()) break;
|
|
|
|
PromoteMemToReg(Allocas, DT, nullptr, &AC);
|
|
NumPromoted += Allocas.size();
|
|
Changed = true;
|
|
}
|
|
|
|
return Changed;
|
|
}
|
|
|
|
// createPromoteMemoryToRegister - Provide an entry point to create this pass.
|
|
//
|
|
FunctionPass *llvm::createPromoteMemoryToRegisterPass() {
|
|
return new PromotePass();
|
|
}
|