mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-25 04:02:41 +01:00
6e5511c95c
NFC. Adding MC regressions tests to cover the XSAVE ISA sets. This patch is part of a larger task to cover MC encoding of all X86 ISA Sets started in revision: https://reviews.llvm.org/D39952 Reviewers: zvi, RKSimon, AndreiGrischenko, craig.topper Differential Revision: https://reviews.llvm.org/D41282 Change-Id: I325bf8f421f78c80179a04fc39033366759cbe45 llvm-svn: 322537
99 lines
2.7 KiB
ArmAsm
99 lines
2.7 KiB
ArmAsm
// RUN: llvm-mc -triple x86_64-unknown-unknown --show-encoding %s | FileCheck %s
|
|
|
|
// CHECK: xrstors 485498096
|
|
// CHECK: encoding: [0x0f,0xc7,0x1c,0x25,0xf0,0x1c,0xf0,0x1c]
|
|
xrstors 485498096
|
|
|
|
// CHECK: xrstors64 485498096
|
|
// CHECK: encoding: [0x48,0x0f,0xc7,0x1c,0x25,0xf0,0x1c,0xf0,0x1c]
|
|
xrstors64 485498096
|
|
|
|
// CHECK: xrstors64 64(%rdx)
|
|
// CHECK: encoding: [0x48,0x0f,0xc7,0x5a,0x40]
|
|
xrstors64 64(%rdx)
|
|
|
|
// CHECK: xrstors64 64(%rdx,%rax,4)
|
|
// CHECK: encoding: [0x48,0x0f,0xc7,0x5c,0x82,0x40]
|
|
xrstors64 64(%rdx,%rax,4)
|
|
|
|
// CHECK: xrstors64 -64(%rdx,%rax,4)
|
|
// CHECK: encoding: [0x48,0x0f,0xc7,0x5c,0x82,0xc0]
|
|
xrstors64 -64(%rdx,%rax,4)
|
|
|
|
// CHECK: xrstors64 64(%rdx,%rax)
|
|
// CHECK: encoding: [0x48,0x0f,0xc7,0x5c,0x02,0x40]
|
|
xrstors64 64(%rdx,%rax)
|
|
|
|
// CHECK: xrstors 64(%rdx)
|
|
// CHECK: encoding: [0x0f,0xc7,0x5a,0x40]
|
|
xrstors 64(%rdx)
|
|
|
|
// CHECK: xrstors64 (%rdx)
|
|
// CHECK: encoding: [0x48,0x0f,0xc7,0x1a]
|
|
xrstors64 (%rdx)
|
|
|
|
// CHECK: xrstors 64(%rdx,%rax,4)
|
|
// CHECK: encoding: [0x0f,0xc7,0x5c,0x82,0x40]
|
|
xrstors 64(%rdx,%rax,4)
|
|
|
|
// CHECK: xrstors -64(%rdx,%rax,4)
|
|
// CHECK: encoding: [0x0f,0xc7,0x5c,0x82,0xc0]
|
|
xrstors -64(%rdx,%rax,4)
|
|
|
|
// CHECK: xrstors 64(%rdx,%rax)
|
|
// CHECK: encoding: [0x0f,0xc7,0x5c,0x02,0x40]
|
|
xrstors 64(%rdx,%rax)
|
|
|
|
// CHECK: xrstors (%rdx)
|
|
// CHECK: encoding: [0x0f,0xc7,0x1a]
|
|
xrstors (%rdx)
|
|
|
|
// CHECK: xsaves 485498096
|
|
// CHECK: encoding: [0x0f,0xc7,0x2c,0x25,0xf0,0x1c,0xf0,0x1c]
|
|
xsaves 485498096
|
|
|
|
// CHECK: xsaves64 485498096
|
|
// CHECK: encoding: [0x48,0x0f,0xc7,0x2c,0x25,0xf0,0x1c,0xf0,0x1c]
|
|
xsaves64 485498096
|
|
|
|
// CHECK: xsaves64 64(%rdx)
|
|
// CHECK: encoding: [0x48,0x0f,0xc7,0x6a,0x40]
|
|
xsaves64 64(%rdx)
|
|
|
|
// CHECK: xsaves64 64(%rdx,%rax,4)
|
|
// CHECK: encoding: [0x48,0x0f,0xc7,0x6c,0x82,0x40]
|
|
xsaves64 64(%rdx,%rax,4)
|
|
|
|
// CHECK: xsaves64 -64(%rdx,%rax,4)
|
|
// CHECK: encoding: [0x48,0x0f,0xc7,0x6c,0x82,0xc0]
|
|
xsaves64 -64(%rdx,%rax,4)
|
|
|
|
// CHECK: xsaves64 64(%rdx,%rax)
|
|
// CHECK: encoding: [0x48,0x0f,0xc7,0x6c,0x02,0x40]
|
|
xsaves64 64(%rdx,%rax)
|
|
|
|
// CHECK: xsaves 64(%rdx)
|
|
// CHECK: encoding: [0x0f,0xc7,0x6a,0x40]
|
|
xsaves 64(%rdx)
|
|
|
|
// CHECK: xsaves64 (%rdx)
|
|
// CHECK: encoding: [0x48,0x0f,0xc7,0x2a]
|
|
xsaves64 (%rdx)
|
|
|
|
// CHECK: xsaves 64(%rdx,%rax,4)
|
|
// CHECK: encoding: [0x0f,0xc7,0x6c,0x82,0x40]
|
|
xsaves 64(%rdx,%rax,4)
|
|
|
|
// CHECK: xsaves -64(%rdx,%rax,4)
|
|
// CHECK: encoding: [0x0f,0xc7,0x6c,0x82,0xc0]
|
|
xsaves -64(%rdx,%rax,4)
|
|
|
|
// CHECK: xsaves 64(%rdx,%rax)
|
|
// CHECK: encoding: [0x0f,0xc7,0x6c,0x02,0x40]
|
|
xsaves 64(%rdx,%rax)
|
|
|
|
// CHECK: xsaves (%rdx)
|
|
// CHECK: encoding: [0x0f,0xc7,0x2a]
|
|
xsaves (%rdx)
|
|
|