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51b37329c1
Summary: This includes a hazard recognizer implementation to replace some of the hazard handling we had during frame index elimination. Reviewers: arsenm Subscribers: qcolombet, arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D18602 llvm-svn: 268143
26 lines
1.1 KiB
LLVM
26 lines
1.1 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=FUNC %s
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; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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; FIXME: Uses of this should be moved to llvm.amdgcn.rsq.clamped, and
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; an r600 variant added.
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declare float @llvm.AMDGPU.rsq.clamped.f32(float) nounwind readnone
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; FUNC-LABEL: {{^}}rsq_clamped_f32:
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; SI: v_rsq_clamp_f32_e32
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; VI-DAG: v_rsq_f32_e32 [[RSQ:v[0-9]+]], {{s[0-9]+}}
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; VI-DAG: v_min_f32_e32 [[MIN:v[0-9]+]], 0x7f7fffff, [[RSQ]]
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; TODO: this constant should be folded:
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; VI-DAG: v_mov_b32_e32 [[MINFLT:v[0-9]+]], 0xff7fffff
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; VI: v_max_f32_e32 {{v[0-9]+}}, [[MIN]], [[MINFLT]]
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; EG: RECIPSQRT_CLAMPED
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define void @rsq_clamped_f32(float addrspace(1)* %out, float %src) nounwind {
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%rsq_clamped = call float @llvm.AMDGPU.rsq.clamped.f32(float %src) nounwind readnone
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store float %rsq_clamped, float addrspace(1)* %out, align 4
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ret void
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}
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