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Evandro Menezes fe13cb66f6 [RISCV] Do not mandate scheduling for CSR instructions
Scheduling information is of little value when they may disrupt the
pipeline.  This patch allows omitting the scheduling information for CSR
instructions while still setting `SchedMachineModel::CompleteModel`.  For
specific cases, any scheduling information added will be used by the
scheduler.

Differential revision: https://reviews.llvm.org/D85366
2020-09-21 18:24:53 -05:00
benchmarks
bindings [OCaml] Remove add_constant_propagation 2020-08-27 09:30:21 -07:00
cmake [cmake] Centralize LLVM_ENABLE_WARNINGS option 2020-09-21 10:23:17 -07:00
docs [llvm-install-name-tool] Update the command-line guide 2020-09-17 13:44:26 -07:00
examples [ORC][examples] Add an OrcV2 example for IR optimization via IRTransformLayer. 2020-09-19 18:59:52 -07:00
include [llvm] Fix comment typos. NFC. 2020-09-21 16:23:49 -07:00
lib [RISCV] Do not mandate scheduling for CSR instructions 2020-09-21 18:24:53 -05:00
projects
resources
runtimes [cmake] Centralize LLVM_ENABLE_WARNINGS option 2020-09-21 10:23:17 -07:00
test Fix comment typos. NFC. 2020-09-21 16:12:56 -07:00
tools [llvm-readobj/libObject] - Get rid of FirstSym argument. NFCI. 2020-09-21 16:07:50 +03:00
unittests [TextAPI] clean up auto usages in tests, NFC 2020-09-21 08:39:40 -07:00
utils [PowerPC] Add vector pair load/store instructions and vector pair register class 2020-09-21 10:27:47 -05:00
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CMakeLists.txt [cmake] Centralize LLVM_ENABLE_WARNINGS option 2020-09-21 10:23:17 -07:00
CODE_OWNERS.TXT Update PowerPC backend ownership in CODE_OWNERS.TXT 2020-09-14 15:45:57 -05:00
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CREDITS.TXT Update my email address. 2020-08-21 10:15:26 -07:00
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