1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-01 16:33:37 +01:00
llvm-mirror/test/MC
Johnny Chen fe24cdbba8 According to A8.6.16 B (Encoding T3) and A8.3 Conditional execution -- A8.3.1
Pseudocode details of conditional, Condition bits '111x' indicate the
instruction is always executed.  That is, '1111' is a leagl condition field
value, which is now mapped to ARMCC::AL.

Also add a test case for condition field '1111'.

llvm-svn: 101817
2010-04-19 21:19:52 +00:00
..
AsmParser teach the x86 asm parser how to handle segment prefixes 2010-04-17 18:56:34 +00:00
Disassembler According to A8.6.16 B (Encoding T3) and A8.3 Conditional execution -- A8.3.1 2010-04-19 21:19:52 +00:00
MachO MC/Mach-O/x86_64: Support @GOTPCREL on symbols, even for non-PCrel relocations! 2010-03-29 23:56:40 +00:00