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llvm-mirror/test/CodeGen/Mips/llvm-ir
Simon Pilgrim 5554f90776 [SelectionDAG] ComputeKnownBits - minimum leading/trailing zero bits in LSHR/SHL (PR44526)
As detailed in https://blog.regehr.org/archives/1709 we don't make use of the known leading/trailing zeros for shifted values in cases where we don't know the shift amount value.

This patch adds support to SelectionDAG::ComputeKnownBits to use KnownBits::countMinTrailingZeros and countMinLeadingZeros to set the minimum guaranteed leading/trailing known zero bits.

Differential Revision: https://reviews.llvm.org/D72573
2020-01-13 11:08:12 +00:00
..
abs.ll
add-dsp.ll
add.ll
addrspacecast.ll
and.ll
arith-fp.ll
ashr.ll
atomicrmx.ll
bitcast.ll
call.ll
cvt.ll
extractelement.ll
fptosi.ll [mips] Fix JmpLink to texternalsym and tglobaladdr on mcroMIPS R6 2019-07-12 04:58:45 +00:00
indirectbr.ll
isel.ll
lh_lhu.ll
load-atomic.ll
load.ll
lshr.ll [SelectionDAG] ComputeKnownBits - minimum leading/trailing zero bits in LSHR/SHL (PR44526) 2020-01-13 11:08:12 +00:00
mul.ll [mips] Use mult/mflo pattern on 64-bit targets prior to MIPS64 2019-07-17 08:11:40 +00:00
not.ll
or.ll
ret.ll
sdiv.ll
select-dbl.ll
select-flt.ll
select-int.ll
shl.ll [MIPS] Regenerate shl/lshr shift tests 2020-01-12 14:35:34 +00:00
sqrt.ll
srem.ll
store-atomic.ll
store.ll
sub.ll
trap.ll
udiv.ll
urem.ll
xor.ll