Vasileios Kalintiris fe5bb204f0 [mips] Enable code generation for MIPS-III. ... Summary: This commit enables the MIPS-III target and adds support for code generation of SELECT nodes. We have to use pseudo-instructions with custom inserters for these nodes as MIPS-III CPUs do not have conditional-move instructions. Depends on D6212 Reviewers: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6464 llvm-svn: 224128		2014-12-12 15:16:46 +00:00
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AArch64	[AArch64] MachO large code-model: Materialize FP constants in code.	2014-12-10 19:43:32 +00:00
ARM	Emit Tag_ABI_FP_16bit_format build attribute.	2014-12-12 11:59:18 +00:00
CPP
Generic	Revert "Revert "DI: Fold constant arguments into a single MDString""	2014-10-03 20:01:09 +00:00
Hexagon	Handle ctor/init_array initialization.	2014-11-03 14:56:05 +00:00
Inputs	Revert "Revert "DI: Fold constant arguments into a single MDString""	2014-10-03 20:01:09 +00:00
Mips	[mips] Enable code generation for MIPS-III.	2014-12-12 15:16:46 +00:00
MSP430
NVPTX	IR: Canonicalize metadata formatting, NFC	2014-12-11 06:32:29 +00:00
PowerPC	[PowerPC] Better lowering for add/or of a FrameIndex	2014-12-11 22:51:06 +00:00
R600	R600: Fix min/max matching problems with unordered compares	2014-12-12 02:30:37 +00:00
SPARC
SystemZ
Thumb	Re-add support to llvm-objdump for Mach-O universal files and archives with -macho	2014-12-04 23:56:27 +00:00
Thumb2	ARM: allow constpool entry to be moved to the user's block in all cases.	2014-11-13 17:58:53 +00:00
X86	[AVX512] Enabling MIN/MAX lowering.	2014-12-12 15:10:43 +00:00
XCore	Fix a bit of confusion about .set and produce more readable assembly.	2014-10-21 01:17:30 +00:00