1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 12:12:47 +01:00
llvm-mirror/test/MC/VE/sym-tpoff.s
Kazushi (Jam) Marukawa 26169930ef [VE] Support relocation information in MC layer
Summary:
Change VEAsmParser to support identification with relocation information
in assmebler.  Change VEAsmBackend to support relocation information in
MC layer.  Change VEDisassembler and VEMCCodeEmitter to support binary
generation of branch target operands.  Add REFLONG fixup and variant kind
to support new R_VE_REFLONG ELF symbol.  And, add regression test in both
MC and CodeGen to check binary genaration with relocation information.

Differential Revision: https://reviews.llvm.org/D81553
2020-06-15 11:24:53 +02:00

15 lines
490 B
ArmAsm

# RUN: llvm-mc -triple=ve %s -o - | FileCheck %s
# RUN: llvm-mc -triple=ve -filetype=obj %s -o - | llvm-objdump -r - | FileCheck %s --check-prefix=CHECK-OBJ
lea %s34, x@tpoff_lo
and %s34, %s34, (32)0
lea.sl %s34, x@tpoff_hi(%s34)
adds.l %s0, %s14, %s34
# CHECK: lea %s34, x@tpoff_lo
# CHECK-NEXT: and %s34, %s34, (32)0
# CHECK-NEXT: lea.sl %s34, x@tpoff_hi(%s34)
# CHECK-NEXT: adds.l %s0, %s14, %s34
# CHECK-OBJ: 0 R_VE_TPOFF_LO32 x
# CHECK-OBJ-NEXT: 10 R_VE_TPOFF_HI32 x