Nemanja Ivanovic fe9adb9248 [Power9] Part-word VSX integer scalar loads/stores and sign extend instructions ... This patch corresponds to review: https://reviews.llvm.org/D23155 This patch removes the VSHRC register class (based on D20310) and adds exploitation of the Power9 sub-word integer loads into VSX registers as well as vector sign extensions. The new instructions are useful for a few purposes: Int to Fp conversions of 1 or 2-byte values loaded from memory Building vectors of 1 or 2-byte integers with values loaded from memory Storing individual 1 or 2-byte elements from integer vectors This patch implements all of those uses. llvm-svn: 283190		2016-10-04 06:59:23 +00:00
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CMakeLists.txt
LLVMBuild.txt
PPCAsmBackend.cpp	MC] Provide an MCTargetOptions to implementors of MCAsmBackendCtorTy, NFC	2016-07-25 17:18:28 +00:00
PPCELFObjectWriter.cpp
PPCFixupKinds.h
PPCMachObjectWriter.cpp
PPCMCAsmInfo.cpp
PPCMCAsmInfo.h
PPCMCCodeEmitter.cpp	[Power9] Part-word VSX integer scalar loads/stores and sign extend instructions	2016-10-04 06:59:23 +00:00
PPCMCExpr.cpp
PPCMCExpr.h
PPCMCTargetDesc.cpp
PPCMCTargetDesc.h	MC] Provide an MCTargetOptions to implementors of MCAsmBackendCtorTy, NFC	2016-07-25 17:18:28 +00:00
PPCPredicates.cpp
PPCPredicates.h