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llvm-mirror/test/CodeGen/R600
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Tom Stellard 43da22dc72 R600: Fix scheduling of instructions that use the LDS output queue 
The LDS output queue is accessed via the OQAP register.  The OQAP
register cannot be live across clauses, so if value is written to the
output queue, it must be retrieved before the end of the clause.
With the machine scheduler, we cannot statisfy this constraint, because
it lacks proper alias analysis and it will mark some LDS accesses as
having a chain dependency on vertex fetches.  Since vertex fetches
require a new clauses, the dependency may end up spiltting OQAP uses and
defs so the end up in different clauses.  See the lds-output-queue.ll
test for a more detailed explanation.

To work around this issue, we now combine the LDS read and the OQAP
copy into one instruction and expand it after register allocation.

This patch also adds some checks to the EmitClauseMarker pass, so that
it doesn't end a clause with a value still in the output queue and
removes AR.X and OQAP handling from the scheduler (AR.X uses and defs
were already being expanded post-RA, so the scheduler will never see
them).

Reviewed-by: Vincent Lejeune <vljn at ovi.com>
llvm-svn: 194755
2013-11-15 00:12:45 +00:00
..
32-bit-local-address-space.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
64bit-kernel-args.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
128bit-kernel-args.ll R600/SI: Use -verify-machineinstrs for most tests 2013-10-10 17:11:46 +00:00
add.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
address-space.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
and.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
array-ptr-calc-i64.ll R600/SI: Add test that fails due to requiring i64 mul for pointers 2013-11-11 23:31:02 +00:00
atomic_load_add.ll R600/SI: Use -verify-machineinstrs for most tests 2013-10-10 17:11:46 +00:00
atomic_load_sub.ll R600/SI: Use -verify-machineinstrs for most tests 2013-10-10 17:11:46 +00:00
bfe_uint.ll R600: Remove AMDILPeeopholeOptimizer and replace optimizations with tablegen patterns 2013-05-10 02:09:45 +00:00
bfi_int.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
big_alu.ll R600: Use function inputs to represent data stored in gpr 2013-11-11 22:10:24 +00:00
bitcast.ll R600/SI: Use -verify-machineinstrs for most tests 2013-10-10 17:11:46 +00:00
build_vector.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
call_fs.ll R600: Add a test for r183108 2013-06-04 15:03:35 +00:00
cf_end.ll R600: Stop emitting the instruction type byte before each instruction 2013-05-06 17:50:44 +00:00
complex-folding.ll R600: Use function inputs to represent data stored in gpr 2013-11-11 22:10:24 +00:00
dagcombiner-bug-illegal-vec4-int-to-fp.ll R600: Prettier asmPrint of Alu 2013-05-02 21:52:30 +00:00
disconnected-predset-break-bug.ll
dot4-folding.ll R600: Const/Neg/Abs can be folded to dot4 2013-06-04 23:17:15 +00:00
elf.ll R600/SI: Use -verify-machineinstrs for most tests 2013-10-10 17:11:46 +00:00
elf.r600.ll R600: Emit config values in register / value pairs 2013-05-06 17:50:51 +00:00
extload.ll R600: Fix selection failure on EXTLOAD 2013-11-13 02:39:07 +00:00
fabs.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
fadd64.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
fadd.ll R600/SI: Use -verify-machineinstrs for most tests 2013-10-10 17:11:46 +00:00
fcmp64.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
fcmp-cnd.ll R600: Non vector only instruction can be scheduled on trans unit 2013-09-04 19:53:46 +00:00
fcmp-cnde-int-args.ll
fcmp.ll R600: Non vector only instruction can be scheduled on trans unit 2013-09-04 19:53:46 +00:00
fconst64.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
fdiv64.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
fdiv.ll R600/SI: Use -verify-machineinstrs for most tests 2013-10-10 17:11:46 +00:00
fetch-limits.r600.ll R600: Fix the fetch limits for R600 generation GPUs 2013-06-07 20:28:55 +00:00
fetch-limits.r700+.ll R600: Fix the fetch limits for R600 generation GPUs 2013-06-07 20:28:55 +00:00
floor.ll R600: Use function inputs to represent data stored in gpr 2013-11-11 22:10:24 +00:00
fma.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
fmad.ll R600: Use function inputs to represent data stored in gpr 2013-11-11 22:10:24 +00:00
fmax.ll R600: Use function inputs to represent data stored in gpr 2013-11-11 22:10:24 +00:00
fmin.ll R600: Use function inputs to represent data stored in gpr 2013-11-11 22:10:24 +00:00
fmul64.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
fmul.ll R600/SI: Use -verify-machineinstrs for most tests 2013-10-10 17:11:46 +00:00
fmuladd.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
fneg.ll R600/SI: Prefer SALU instructions for bit shift operations 2013-11-13 23:36:37 +00:00
fp64_to_sint.ll R600/SI: Use -verify-machineinstrs for most tests 2013-10-10 17:11:46 +00:00
fp_to_sint.ll R600/SI: Use -verify-machineinstrs for most tests 2013-10-10 17:11:46 +00:00
fp_to_uint.ll R600/SI: Use -verify-machineinstrs for most tests 2013-10-10 17:11:46 +00:00
fpext.ll R600/SI: Use -verify-machineinstrs for most tests 2013-10-10 17:11:46 +00:00
fptrunc.ll R600/SI: Use -verify-machineinstrs for most tests 2013-10-10 17:11:46 +00:00
fsqrt.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
fsub64.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
fsub.ll R600/SI: Use -verify-machineinstrs for most tests 2013-10-10 17:11:46 +00:00
gep-address-space.ll Fix CodeGen for vectors of pointers with address spaces. 2013-10-21 20:03:58 +00:00
i8-to-double-to-float.ll R600: Use KCache for kernel arguments 2013-07-23 01:48:18 +00:00
icmp-select-sete-reverse-args.ll R600: Non vector only instruction can be scheduled on trans unit 2013-09-04 19:53:46 +00:00
imm.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
indirect-addressing-si.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
insert_vector_elt.ll Add some xfaild R600 tests. 2013-10-08 18:06:36 +00:00
jump-address.ll R600: add a pass that merges clauses. 2013-10-01 19:32:58 +00:00
kcache-fold.ll R600: Fix handling of NAN in comparison instructions 2013-09-28 02:50:50 +00:00
kernel-args.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
lds-output-queue.ll R600: Fix scheduling of instructions that use the LDS output queue 2013-11-15 00:12:45 +00:00
lds-size.ll R600: Fix incorrect LDS size calculation 2013-09-05 18:37:57 +00:00
legalizedag-bug-expand-setcc.ll
lit.local.cfg [tests] Cleanup initialization of test suffixes. 2013-08-16 00:37:11 +00:00
literals.ll R600: Move code handling literal folding into R600ISelLowering. 2013-09-12 23:44:53 +00:00
llvm.AMDGPU.barrier.local.ll R600: Add support for GROUP_BARRIER instruction 2013-06-28 15:46:59 +00:00
llvm.AMDGPU.cube.ll R600: Use new getNamedOperandIdx function generated by TableGen 2013-06-25 21:22:18 +00:00
llvm.AMDGPU.imax.ll R600/SI: Use -verify-machineinstrs for most tests 2013-10-10 17:11:46 +00:00
llvm.AMDGPU.imin.ll R600/SI: Use -verify-machineinstrs for most tests 2013-10-10 17:11:46 +00:00
llvm.AMDGPU.mul.ll R600: Use function inputs to represent data stored in gpr 2013-11-11 22:10:24 +00:00
llvm.AMDGPU.tex.ll R600: Swizzle texture/export instructions 2013-06-04 15:04:53 +00:00
llvm.AMDGPU.trunc.ll R600/SI: Use -verify-machineinstrs for most tests 2013-10-10 17:11:46 +00:00
llvm.AMDGPU.umax.ll R600/SI: Use -verify-machineinstrs for most tests 2013-10-10 17:11:46 +00:00
llvm.AMDGPU.umin.ll R600/SI: Use -verify-machineinstrs for most tests 2013-10-10 17:11:46 +00:00
llvm.cos.ll R600: Use function inputs to represent data stored in gpr 2013-11-11 22:10:24 +00:00
llvm.floor.ll R600/SI: Use -verify-machineinstrs for most tests 2013-10-10 17:11:46 +00:00
llvm.pow.ll R600: Use function inputs to represent data stored in gpr 2013-11-11 22:10:24 +00:00
llvm.rint.ll R600/SI: Use -verify-machineinstrs for most tests 2013-10-10 17:11:46 +00:00
llvm.SI.fs.interp.constant.ll R600/SI: Use -verify-machineinstrs for most tests 2013-10-10 17:11:46 +00:00
llvm.SI.imageload.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
llvm.SI.resinfo.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
llvm.SI.sample-masked.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
llvm.SI.sample.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
llvm.SI.sampled.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
llvm.SI.tbuffer.store.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
llvm.SI.tid.ll R600/SI: Use -verify-machineinstrs for most tests 2013-10-10 17:11:46 +00:00
llvm.sin.ll R600: Use function inputs to represent data stored in gpr 2013-11-11 22:10:24 +00:00
llvm.sqrt.ll R600: Expand vector FSQRT ops 2013-10-29 16:37:20 +00:00
load64.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
load-input-fold.ll R600: Use function inputs to represent data stored in gpr 2013-11-11 22:10:24 +00:00
load.ll R600/SI: Add support for private address space load/store 2013-11-13 23:36:50 +00:00
load.vec.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
local-memory-two-objects.ll R600: Fix scheduling of instructions that use the LDS output queue 2013-11-15 00:12:45 +00:00
local-memory.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
loop-address.ll R600: add a pass that merges clauses. 2013-10-01 19:32:58 +00:00
lshl.ll R600/SI: Prefer SALU instructions for bit shift operations 2013-11-13 23:36:37 +00:00
lshr.ll R600/SI: Prefer SALU instructions for bit shift operations 2013-11-13 23:36:37 +00:00
mad_int24.ll R600/SI: Use -verify-machineinstrs for most tests 2013-10-10 17:11:46 +00:00
mad_uint24.ll R600/SI: Prefer SALU instructions for bit shift operations 2013-11-13 23:36:37 +00:00
max-literals.ll R600: Use function inputs to represent data stored in gpr 2013-11-11 22:10:24 +00:00
mul_int24.ll R600/SI: Use -verify-machineinstrs for most tests 2013-10-10 17:11:46 +00:00
mul_uint24.ll R600/SI: Prefer SALU instructions for bit shift operations 2013-11-13 23:36:37 +00:00
mul.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
mulhu.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
or.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
packetizer.ll R600: Fix typo in R600Schedule.td 2013-06-25 02:39:20 +00:00
parallelandifcollapse.ll Factor FlattenCFG out from SimplifyCFG 2013-08-06 02:43:45 +00:00
parallelorifcollapse.ll Factor FlattenCFG out from SimplifyCFG 2013-08-06 02:43:45 +00:00
predicates.ll R600: Prettier asmPrint of Alu 2013-05-02 21:52:30 +00:00
private-memory.ll R600/SI: Add support for private address space load/store 2013-11-13 23:36:50 +00:00
pv-packing.ll R600: Use function inputs to represent data stored in gpr 2013-11-11 22:10:24 +00:00
pv.ll R600: Use function inputs to represent data stored in gpr 2013-11-11 22:10:24 +00:00
r600-encoding.ll R600: Use function inputs to represent data stored in gpr 2013-11-11 22:10:24 +00:00
r600-export-fix.ll R600: Use function inputs to represent data stored in gpr 2013-11-11 22:10:24 +00:00
r600cfg.ll R600: Use function inputs to represent data stored in gpr 2013-11-11 22:10:24 +00:00
README
reciprocal.ll R600: Use function inputs to represent data stored in gpr 2013-11-11 22:10:24 +00:00
rotr.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
rv7x0_count3.ll R600: Use function inputs to represent data stored in gpr 2013-11-11 22:10:24 +00:00
schedule-fs-loop-nested-if.ll R600: Use function inputs to represent data stored in gpr 2013-11-11 22:10:24 +00:00
schedule-fs-loop-nested.ll R600: Enable -verify-machineinstrs in some tests. 2013-10-01 19:32:38 +00:00
schedule-fs-loop.ll R600: Enable -verify-machineinstrs in some tests. 2013-10-01 19:32:38 +00:00
schedule-if-2.ll R600: Enable -verify-machineinstrs in some tests. 2013-10-01 19:32:38 +00:00
schedule-if.ll R600: Enable -verify-machineinstrs in some tests. 2013-10-01 19:32:38 +00:00
schedule-vs-if-nested-loop.ll R600: Use function inputs to represent data stored in gpr 2013-11-11 22:10:24 +00:00
sdiv.ll
select.ll R600: Expand SELECT nodes rather than custom lowering them 2013-09-05 18:38:03 +00:00
selectcc-cnd.ll R600: Non vector only instruction can be scheduled on trans unit 2013-09-04 19:53:46 +00:00
selectcc-cnde-int.ll R600: Non vector only instruction can be scheduled on trans unit 2013-09-04 19:53:46 +00:00
selectcc-icmp-select-float.ll R600: Prettier asmPrint of Alu 2013-05-02 21:52:30 +00:00
selectcc-opt.ll R600: add a pass that merges clauses. 2013-10-01 19:32:58 +00:00
set-dx10.ll R600: Fix handling of NAN in comparison instructions 2013-09-28 02:50:50 +00:00
setcc.ll R600: Set scheduling preference to Sched::Source 2013-08-12 22:33:21 +00:00
seto.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
setuo.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
sgpr-copy-duplicate-operand.ll R600/SI: Add testcase for problem I ran into 2013-11-14 07:57:29 +00:00
sgpr-copy.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
shared-op-cycle.ll R600: Use function inputs to represent data stored in gpr 2013-11-11 22:10:24 +00:00
shl.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
si-annotate-cf-assertion.ll Add some xfaild R600 tests. 2013-10-08 18:06:36 +00:00
si-lod-bias.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
si-vector-hang.ll R600/SI: Use -verify-machineinstrs for most tests 2013-10-10 17:11:46 +00:00
sign_extend.ll R600/SI: Use -verify-machineinstrs for most tests 2013-10-10 17:11:46 +00:00
sint_to_fp64.ll R600/SI: Use -verify-machineinstrs for most tests 2013-10-10 17:11:46 +00:00
sint_to_fp.ll R600/SI: Use -verify-machineinstrs for most tests 2013-10-10 17:11:46 +00:00
sra.ll R600/SI: Add support for private address space load/store 2013-11-13 23:36:50 +00:00
srl.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
store-vector-ptrs.ll Add some xfaild R600 tests. 2013-10-08 18:06:36 +00:00
store.ll R600: Fix handling of vector kernel arguments 2013-10-23 00:44:32 +00:00
store.r600.ll R600: Change the RAT instruction assembly names so they match the docs 2013-08-16 01:11:46 +00:00
structurize.ll R600: Fix a crash in the AMDILCFGStructurizer 2013-10-16 17:06:02 +00:00
sub.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
swizzle-export.ll R600: Use function inputs to represent data stored in gpr 2013-11-11 22:10:24 +00:00
tex-clause-antidep.ll R600: Use function inputs to represent data stored in gpr 2013-11-11 22:10:24 +00:00
texture-input-merge.ll R600: Use function inputs to represent data stored in gpr 2013-11-11 22:10:24 +00:00
trunc-vector-store-assertion-failure.ll SelectionDAG: Make sure stores are always added to the LegalizedNodes list 2013-08-21 22:42:58 +00:00
trunc.ll R600/SI: Prefer SALU instructions for bit shift operations 2013-11-13 23:36:37 +00:00
udiv.ll R600: Fix LowerUDIVREM 2013-11-06 17:36:04 +00:00
uint_to_fp.ll R600: Custom lower f32 = uint_to_fp i64 2013-10-30 17:22:05 +00:00
unaligned-load-store.ll R600/SI: Add support for private address space load/store 2013-11-13 23:36:50 +00:00
unsupported-cc.ll R600: Fix handling of NAN in comparison instructions 2013-09-28 02:50:50 +00:00
urecip.ll R600/SI: Use -verify-machineinstrs for most tests 2013-10-10 17:11:46 +00:00
urem.ll R600/SI: Use -verify-machineinstrs for most tests 2013-10-10 17:11:46 +00:00
vertex-fetch-encoding.ll R600: Add support for v4i32 stores on Cayman 2013-08-16 01:12:00 +00:00
vselect.ll R600/SI: Use -verify-machineinstrs for most tests 2013-10-10 17:11:46 +00:00
vtx-schedule.ll R600: Use KCache for kernel arguments 2013-07-23 01:48:18 +00:00
wait.ll R600: improve dump of S_WAITCNT 2013-10-13 17:56:28 +00:00
work-item-intrinsics.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
wrong-transalu-pos-fix.ll TBAA: remove !tbaa from testing cases when they are not needed. 2013-09-30 18:17:35 +00:00
xor.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00
zero_extend.ll R600/SI: Change formatting of printed registers. 2013-11-12 02:35:51 +00:00

README 

+==============================================================================+
| How to organize the lit tests                                                |
+==============================================================================+

- If you write a test for matching a single DAG opcode or intrinsic, it should
  go in a file called {opcode_name,intrinsic_name}.ll (e.g. fadd.ll)

- If you write a test that matches several DAG opcodes and checks for a single
  ISA instruction, then that test should go in a file called {ISA_name}.ll (e.g.
  bfi_int.ll

- For all other tests, use your best judgement for organizing tests and naming
  the files.

+==============================================================================+
| Naming conventions                                                           |
+==============================================================================+

- Use dash '-' and not underscore '_' to separate words in file names, unless
  the file is named after a DAG opcode or ISA instruction that has an
  underscore '_' in its name.