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32 lines
1.1 KiB
LLVM
32 lines
1.1 KiB
LLVM
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
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; CHECK: @main
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; CHECK: MULADD_IEEE *
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; CHECK-NOT: MULADD_IEEE *
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define void @main(<4 x float> inreg %reg0, <4 x float> inreg %reg1, <4 x float> inreg %reg2) #0 {
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%w0 = extractelement <4 x float> %reg0, i32 3
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%w1 = extractelement <4 x float> %reg1, i32 3
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%w2 = extractelement <4 x float> %reg2, i32 3
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%sq0 = fmul float %w0, %w0
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%r0 = fadd float %sq0, 2.0
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%sq1 = fmul float %w1, %w1
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%r1 = fadd float %sq1, 2.0
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%sq2 = fmul float %w2, %w2
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%r2 = fadd float %sq2, 2.0
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%v0 = insertelement <4 x float> undef, float %r0, i32 0
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%v1 = insertelement <4 x float> %v0, float %r1, i32 1
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%v2 = insertelement <4 x float> %v1, float %r2, i32 2
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%res = call float @llvm.AMDGPU.dp4(<4 x float> %v2, <4 x float> %v2)
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%vecres = insertelement <4 x float> undef, float %res, i32 0
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call void @llvm.R600.store.swizzle(<4 x float> %vecres, i32 0, i32 2)
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ret void
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}
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; Function Attrs: readnone
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declare float @llvm.AMDGPU.dp4(<4 x float>, <4 x float>) #1
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declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
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attributes #0 = { "ShaderType"="1" }
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attributes #1 = { readnone } |