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llvm-mirror/test/CodeGen/ARM/mul.ll
Saleem Abdulrasool 859dccec1f ARM: update even more tests
More updating of tests to be explicit about the target triple rather than
relying on the default target triple supporting ARM mode.

Indicate to lit that object emission is not yet available for Windows on ARM.

llvm-svn: 205545
2014-04-03 17:35:22 +00:00

33 lines
435 B
LLVM

; RUN: llc -mtriple=arm-eabi %s -o - | FileCheck %s
define i32 @f1(i32 %u) {
%tmp = mul i32 %u, %u
ret i32 %tmp
}
; CHECK: mul
define i32 @f2(i32 %u, i32 %v) {
%tmp = mul i32 %u, %v
ret i32 %tmp
}
define i32 @f3(i32 %u) {
%tmp = mul i32 %u, 5
ret i32 %tmp
}
; CHECK: mul
; CHECK: lsl
define i32 @f4(i32 %u) {
%tmp = mul i32 %u, 4
ret i32 %tmp
}
; CHECK-NOT: mul
; CHECK: lsl
; CHECK-NOT: lsl