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llvm-mirror/test/CodeGen/R600/codegen-prepare-addrmode-sext.ll
Quentin Colombet 5c6ea83f97 [CodeGenPrepare] Fix the check of the legality of an instruction.
The API expects an ISD opcode, not an IR opcode.
Fixes a regression for R600.

Related to <rdar://problem/15519855>.

llvm-svn: 201923
2014-02-22 01:06:41 +00:00

20 lines
748 B
LLVM

; RUN: opt -codegenprepare -S -o - %s | FileCheck --check-prefix=OPT --check-prefix=FUNC %s
; RUN: llc < %s -march=r600 -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI-LLC --check-prefix=FUNC %s
target datalayout = "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:32:32-p5:64:64-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"
target triple = "r600--"
; FUNC-LABEL: @test
; OPT: mul nsw i32
; OPT-NEXT: sext
; SI-LLC: V_MUL_LO_I32
; SI-LLC-NOT: V_MUL_HI
define void @test(i8 addrspace(1)* nocapture readonly %in, i32 %a, i8 %b) {
entry:
%0 = mul nsw i32 %a, 3
%1 = sext i32 %0 to i64
%2 = getelementptr i8 addrspace(1)* %in, i64 %1
store i8 %b, i8 addrspace(1)* %2
ret void
}