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ad5400fa72
for pre-2.9 bitcode files. We keep x86 unaligned loads, movnt, crc32, and the target indep prefetch change. As usual, updating the testsuite is a PITA. llvm-svn: 133337
20 lines
645 B
LLVM
20 lines
645 B
LLVM
; RUN: llc < %s -mtriple=thumbv7-apple-darwin -regalloc=linearscan -disable-post-ra | FileCheck %s
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; The ARM magic hinting works best with linear scan.
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; CHECK: ldrd
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; CHECK: strd
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; CHECK: ldrb
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%struct.x = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 }
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@src = external global %struct.x
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@dst = external global %struct.x
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define i32 @t() {
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entry:
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call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds (%struct.x* @dst, i32 0, i32 0), i8* getelementptr inbounds (%struct.x* @src, i32 0, i32 0), i32 11, i32 8, i1 false)
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ret i32 0
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}
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declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
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