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llvm-mirror/lib/Object/ELF.cpp
Alex Bradbury 3d909d1279 [RISCV] Add RISC-V ELF defines
Add the necessary definitions for RISC-V ELF files, including relocs. Also 
make necessary trivial change to ELFYaml, llvm-objdump, and llvm-readobj in 
order to work with RISC-V ELFs.

Differential Revision: https://reviews.llvm.org/D23557

llvm-svn: 285708
2016-11-01 16:59:37 +00:00

145 lines
2.9 KiB
C++

//===- ELF.cpp - ELF object file implementation -----------------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
#include "llvm/Object/ELF.h"
namespace llvm {
namespace object {
#define ELF_RELOC(name, value) \
case ELF::name: \
return #name; \
StringRef getELFRelocationTypeName(uint32_t Machine, uint32_t Type) {
switch (Machine) {
case ELF::EM_X86_64:
switch (Type) {
#include "llvm/Support/ELFRelocs/x86_64.def"
default:
break;
}
break;
case ELF::EM_386:
case ELF::EM_IAMCU:
switch (Type) {
#include "llvm/Support/ELFRelocs/i386.def"
default:
break;
}
break;
case ELF::EM_MIPS:
switch (Type) {
#include "llvm/Support/ELFRelocs/Mips.def"
default:
break;
}
break;
case ELF::EM_AARCH64:
switch (Type) {
#include "llvm/Support/ELFRelocs/AArch64.def"
default:
break;
}
break;
case ELF::EM_ARM:
switch (Type) {
#include "llvm/Support/ELFRelocs/ARM.def"
default:
break;
}
break;
case ELF::EM_AVR:
switch (Type) {
#include "llvm/Support/ELFRelocs/AVR.def"
default:
break;
}
break;
case ELF::EM_HEXAGON:
switch (Type) {
#include "llvm/Support/ELFRelocs/Hexagon.def"
default:
break;
}
break;
case ELF::EM_LANAI:
switch (Type) {
#include "llvm/Support/ELFRelocs/Lanai.def"
default:
break;
}
break;
case ELF::EM_PPC:
switch (Type) {
#include "llvm/Support/ELFRelocs/PowerPC.def"
default:
break;
}
break;
case ELF::EM_PPC64:
switch (Type) {
#include "llvm/Support/ELFRelocs/PowerPC64.def"
default:
break;
}
break;
case ELF::EM_RISCV:
switch (Type) {
#include "llvm/Support/ELFRelocs/RISCV.def"
default:
break;
}
break;
case ELF::EM_S390:
switch (Type) {
#include "llvm/Support/ELFRelocs/SystemZ.def"
default:
break;
}
break;
case ELF::EM_SPARC:
case ELF::EM_SPARC32PLUS:
case ELF::EM_SPARCV9:
switch (Type) {
#include "llvm/Support/ELFRelocs/Sparc.def"
default:
break;
}
break;
case ELF::EM_WEBASSEMBLY:
switch (Type) {
#include "llvm/Support/ELFRelocs/WebAssembly.def"
default:
break;
}
break;
case ELF::EM_AMDGPU:
switch (Type) {
#include "llvm/Support/ELFRelocs/AMDGPU.def"
default:
break;
}
case ELF::EM_BPF:
switch (Type) {
#include "llvm/Support/ELFRelocs/BPF.def"
default:
break;
}
break;
default:
break;
}
return "Unknown";
}
#undef ELF_RELOC
} // end namespace object
} // end namespace llvm