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https://github.com/RPCS3/llvm-mirror.git
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7f65ef970c
```
unsigned r(int v)
{
return (1 | -(v < 0)) * v;
}
`r` is equivalent to `abs(v)`.
```
```
define <4 x i8> @src(<4 x i8> %0) {
%1:
%2 = ashr <4 x i8> %0, { 31, undef, 31, 31 }
%3 = or <4 x i8> %2, { 1, 1, 1, undef }
%4 = mul nsw <4 x i8> %3, %0
ret <4 x i8> %4
}
=>
define <4 x i8> @tgt(<4 x i8> %0) {
%1:
%2 = icmp slt <4 x i8> %0, { 0, 0, 0, 0 }
%3 = sub nsw <4 x i8> { 0, 0, 0, 0 }, %0
%4 = select <4 x i1> %2, <4 x i8> %3, <4 x i8> %0
ret <4 x i8> %4
}
Transformation seems to be correct!
```
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D94874
116 lines
3.4 KiB
LLVM
116 lines
3.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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; ((ashr X, 31) | 1 ) * X --> abs(X)
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; X * ((ashr X, 31) | 1 ) --> abs(X)
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define i32 @ashr_or_mul_to_abs(i32 %X) {
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; CHECK-LABEL: @ashr_or_mul_to_abs(
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; CHECK-NEXT: [[I2:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
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; CHECK-NEXT: ret i32 [[I2]]
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;
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%i = ashr i32 %X, 31
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%i1 = or i32 %i, 1
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%i2 = mul nsw i32 %i1, %X
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ret i32 %i2
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}
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define i32 @ashr_or_mul_to_abs2(i32 %X) {
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; CHECK-LABEL: @ashr_or_mul_to_abs2(
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; CHECK-NEXT: [[I2:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
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; CHECK-NEXT: ret i32 [[I2]]
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;
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%i = ashr i32 %X, 31
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%i1 = or i32 %i, 1
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%i2 = mul i32 %i1, %X
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ret i32 %i2
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}
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define i32 @ashr_or_mul_to_abs3(i32 %PX) {
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; CHECK-LABEL: @ashr_or_mul_to_abs3(
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; CHECK-NEXT: [[X:%.*]] = sdiv i32 42, [[PX:%.*]]
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; CHECK-NEXT: [[I2:%.*]] = call i32 @llvm.abs.i32(i32 [[X]], i1 false)
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; CHECK-NEXT: ret i32 [[I2]]
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;
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%X = sdiv i32 42, %PX ; thwart complexity-based canonicalization
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%i = ashr i32 %X, 31
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%i1 = or i32 %i, 1
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%i2 = mul i32 %X, %i1
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ret i32 %i2
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}
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define <4 x i32> @ashr_or_mul_to_abs_vec(<4 x i32> %X) {
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; CHECK-LABEL: @ashr_or_mul_to_abs_vec(
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; CHECK-NEXT: [[I2:%.*]] = call <4 x i32> @llvm.abs.v4i32(<4 x i32> [[X:%.*]], i1 false)
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; CHECK-NEXT: ret <4 x i32> [[I2]]
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;
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%i = ashr <4 x i32> %X, <i32 31, i32 31, i32 31, i32 31>
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%i1 = or <4 x i32> %i, <i32 1, i32 1, i32 1, i32 1>
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%i2 = mul <4 x i32> %i1, %X
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ret <4 x i32> %i2
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}
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define <4 x i32> @ashr_or_mul_to_abs_vec2(<4 x i32> %X) {
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; CHECK-LABEL: @ashr_or_mul_to_abs_vec2(
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; CHECK-NEXT: [[I2:%.*]] = call <4 x i32> @llvm.abs.v4i32(<4 x i32> [[X:%.*]], i1 true)
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; CHECK-NEXT: ret <4 x i32> [[I2]]
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;
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%i = ashr <4 x i32> %X, <i32 31, i32 31, i32 31, i32 31>
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%i1 = or <4 x i32> %i, <i32 1, i32 1, i32 1, i32 1>
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%i2 = mul nsw <4 x i32> %i1, %X
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ret <4 x i32> %i2
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}
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define <4 x i32> @ashr_or_mul_to_abs_vec3_undef(<4 x i32> %X) {
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; CHECK-LABEL: @ashr_or_mul_to_abs_vec3_undef(
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; CHECK-NEXT: [[I2:%.*]] = call <4 x i32> @llvm.abs.v4i32(<4 x i32> [[X:%.*]], i1 false)
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; CHECK-NEXT: ret <4 x i32> [[I2]]
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;
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%i = ashr <4 x i32> %X, <i32 31, i32 undef, i32 31, i32 31>
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%i1 = or <4 x i32> %i, <i32 1, i32 1, i32 1, i32 undef>
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%i2 = mul <4 x i32> %i1, %X
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ret <4 x i32> %i2
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}
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; Negative tests
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define i32 @ashr_or_mul_to_abs_neg(i32 %X) {
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; CHECK-LABEL: @ashr_or_mul_to_abs_neg(
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; CHECK-NEXT: [[I:%.*]] = ashr i32 [[X:%.*]], 30
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; CHECK-NEXT: [[I1:%.*]] = or i32 [[I]], 1
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; CHECK-NEXT: [[I2:%.*]] = mul nsw i32 [[I1]], [[X]]
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; CHECK-NEXT: ret i32 [[I2]]
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;
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%i = ashr i32 %X, 30
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%i1 = or i32 %i, 1
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%i2 = mul nsw i32 %i1, %X
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ret i32 %i2
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}
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define i32 @ashr_or_mul_to_abs_neg2(i32 %X) {
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; CHECK-LABEL: @ashr_or_mul_to_abs_neg2(
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; CHECK-NEXT: [[I:%.*]] = ashr i32 [[X:%.*]], 31
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; CHECK-NEXT: [[I1:%.*]] = or i32 [[I]], 2
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; CHECK-NEXT: [[I2:%.*]] = mul nsw i32 [[I1]], [[X]]
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; CHECK-NEXT: ret i32 [[I2]]
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;
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%i = ashr i32 %X, 31
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%i1 = or i32 %i, 2
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%i2 = mul nsw i32 %i1, %X
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ret i32 %i2
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}
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define i32 @ashr_or_mul_to_abs_neg3(i32 %X, i32 %Y) {
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; CHECK-LABEL: @ashr_or_mul_to_abs_neg3(
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; CHECK-NEXT: [[I:%.*]] = ashr i32 [[X:%.*]], 31
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; CHECK-NEXT: [[I1:%.*]] = or i32 [[I]], 1
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; CHECK-NEXT: [[I2:%.*]] = mul nsw i32 [[I1]], [[Y:%.*]]
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; CHECK-NEXT: ret i32 [[I2]]
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;
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%i = ashr i32 %X, 31
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%i1 = or i32 %i, 1
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%i2 = mul nsw i32 %i1, %Y
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ret i32 %i2
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}
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