mirror of
https://github.com/RPCS3/llvm-mirror.git
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302c879f6c
This replicates existing and/or tests to also test variants using select. This should help us get a more accurate view on which optimizations we're missing if we disable the select -> and/or fold.
454 lines
10 KiB
LLVM
454 lines
10 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; This test makes sure that all icmp instructions are eliminated.
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; RUN: opt < %s -instcombine -S | FileCheck %s
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@X = external global i32
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define i1 @test1(i32 %A) {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: ret i1 false
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;
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%B = icmp eq i32 %A, %A
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; Never true
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%C = icmp eq i32* @X, null
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%D = and i1 %B, %C
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ret i1 %D
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}
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define i1 @test1_logical(i32 %A) {
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; CHECK-LABEL: @test1_logical(
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; CHECK-NEXT: ret i1 false
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;
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%B = icmp eq i32 %A, %A
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; Never true
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%C = icmp eq i32* @X, null
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%D = select i1 %B, i1 %C, i1 false
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ret i1 %D
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}
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define i1 @test2(i32 %A) {
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: ret i1 true
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;
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%B = icmp ne i32 %A, %A
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; Never false
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%C = icmp ne i32* @X, null
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%D = or i1 %B, %C
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ret i1 %D
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}
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define i1 @test2_logical(i32 %A) {
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; CHECK-LABEL: @test2_logical(
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; CHECK-NEXT: ret i1 true
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;
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%B = icmp ne i32 %A, %A
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; Never false
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%C = icmp ne i32* @X, null
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%D = select i1 %B, i1 true, i1 %C
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ret i1 %D
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}
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define i1 @test3(i32 %A) {
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; CHECK-LABEL: @test3(
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; CHECK-NEXT: ret i1 false
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;
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%B = icmp slt i32 %A, %A
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ret i1 %B
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}
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define i1 @test4(i32 %A) {
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; CHECK-LABEL: @test4(
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; CHECK-NEXT: ret i1 false
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;
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%B = icmp sgt i32 %A, %A
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ret i1 %B
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}
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define i1 @test5(i32 %A) {
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; CHECK-LABEL: @test5(
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; CHECK-NEXT: ret i1 true
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;
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%B = icmp sle i32 %A, %A
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ret i1 %B
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}
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define i1 @test6(i32 %A) {
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; CHECK-LABEL: @test6(
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; CHECK-NEXT: ret i1 true
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;
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%B = icmp sge i32 %A, %A
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ret i1 %B
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}
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define i1 @test7(i32 %A) {
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; CHECK-LABEL: @test7(
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; CHECK-NEXT: ret i1 true
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;
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%B = icmp uge i32 %A, 0
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ret i1 %B
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}
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define i1 @test8(i32 %A) {
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; CHECK-LABEL: @test8(
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; CHECK-NEXT: ret i1 false
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;
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%B = icmp ult i32 %A, 0
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ret i1 %B
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}
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;; test operations on boolean values these should all be eliminated$a
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define i1 @test9(i1 %A) {
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; CHECK-LABEL: @test9(
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; CHECK-NEXT: ret i1 false
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;
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%B = icmp ult i1 %A, false
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ret i1 %B
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}
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define i1 @test10(i1 %A) {
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; CHECK-LABEL: @test10(
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; CHECK-NEXT: ret i1 false
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;
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%B = icmp ugt i1 %A, true
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ret i1 %B
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}
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define i1 @test11(i1 %A) {
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; CHECK-LABEL: @test11(
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; CHECK-NEXT: ret i1 true
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;
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%B = icmp ule i1 %A, true
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ret i1 %B
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}
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define i1 @test12(i1 %A) {
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; CHECK-LABEL: @test12(
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; CHECK-NEXT: ret i1 true
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;
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%B = icmp uge i1 %A, false
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ret i1 %B
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}
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define i1 @test13(i1 %A, i1 %B) {
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; CHECK-LABEL: @test13(
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; CHECK-NEXT: [[TMP1:%.*]] = xor i1 [[B:%.*]], true
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; CHECK-NEXT: [[C:%.*]] = or i1 [[TMP1]], [[A:%.*]]
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; CHECK-NEXT: ret i1 [[C]]
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;
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%C = icmp uge i1 %A, %B
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ret i1 %C
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}
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define <2 x i1> @test13vec(<2 x i1> %A, <2 x i1> %B) {
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; CHECK-LABEL: @test13vec(
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; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i1> [[B:%.*]], <i1 true, i1 true>
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; CHECK-NEXT: [[C:%.*]] = or <2 x i1> [[TMP1]], [[A:%.*]]
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; CHECK-NEXT: ret <2 x i1> [[C]]
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;
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%C = icmp uge <2 x i1> %A, %B
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ret <2 x i1> %C
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}
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define i1 @test14(i1 %A, i1 %B) {
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; CHECK-LABEL: @test14(
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; CHECK-NEXT: [[TMP1:%.*]] = xor i1 [[A:%.*]], [[B:%.*]]
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; CHECK-NEXT: [[C:%.*]] = xor i1 [[TMP1]], true
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; CHECK-NEXT: ret i1 [[C]]
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;
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%C = icmp eq i1 %A, %B
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ret i1 %C
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}
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define <3 x i1> @test14vec(<3 x i1> %A, <3 x i1> %B) {
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; CHECK-LABEL: @test14vec(
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; CHECK-NEXT: [[TMP1:%.*]] = xor <3 x i1> [[A:%.*]], [[B:%.*]]
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; CHECK-NEXT: [[C:%.*]] = xor <3 x i1> [[TMP1]], <i1 true, i1 true, i1 true>
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; CHECK-NEXT: ret <3 x i1> [[C]]
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;
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%C = icmp eq <3 x i1> %A, %B
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ret <3 x i1> %C
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}
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define i1 @bool_eq0(i64 %a) {
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; CHECK-LABEL: @bool_eq0(
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; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i64 [[A:%.*]], 1
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; CHECK-NEXT: ret i1 [[TMP1]]
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;
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%b = icmp sgt i64 %a, 0
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%c = icmp eq i64 %a, 1
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%notc = icmp eq i1 %c, false
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%and = and i1 %b, %notc
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ret i1 %and
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}
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define i1 @bool_eq0_logical(i64 %a) {
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; CHECK-LABEL: @bool_eq0_logical(
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; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i64 [[A:%.*]], 1
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; CHECK-NEXT: ret i1 [[TMP1]]
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;
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%b = icmp sgt i64 %a, 0
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%c = icmp eq i64 %a, 1
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%notc = icmp eq i1 %c, false
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%and = select i1 %b, i1 %notc, i1 false
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ret i1 %and
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}
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; This is equivalent to the previous test.
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define i1 @xor_of_icmps(i64 %a) {
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; CHECK-LABEL: @xor_of_icmps(
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; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i64 [[A:%.*]], 1
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; CHECK-NEXT: ret i1 [[TMP1]]
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;
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%b = icmp sgt i64 %a, 0
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%c = icmp eq i64 %a, 1
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%xor = xor i1 %c, %b
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ret i1 %xor
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}
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; This is also equivalent to the previous test.
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define i1 @xor_of_icmps_commute(i64 %a) {
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; CHECK-LABEL: @xor_of_icmps_commute(
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; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i64 [[A:%.*]], 1
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; CHECK-NEXT: ret i1 [[TMP1]]
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;
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%b = icmp sgt i64 %a, 0
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%c = icmp eq i64 %a, 1
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%xor = xor i1 %b, %c
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ret i1 %xor
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}
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; FIXME: This is (a != 5).
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define i1 @xor_of_icmps_folds_more(i64 %a) {
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; CHECK-LABEL: @xor_of_icmps_folds_more(
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; CHECK-NEXT: [[B:%.*]] = icmp sgt i64 [[A:%.*]], 4
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; CHECK-NEXT: [[C:%.*]] = icmp slt i64 [[A]], 6
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; CHECK-NEXT: [[XOR:%.*]] = xor i1 [[B]], [[C]]
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; CHECK-NEXT: ret i1 [[XOR]]
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;
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%b = icmp sgt i64 %a, 4
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%c = icmp slt i64 %a, 6
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%xor = xor i1 %b, %c
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ret i1 %xor
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}
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; https://bugs.llvm.org/show_bug.cgi?id=2844
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define i32 @PR2844(i32 %x) {
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; CHECK-LABEL: @PR2844(
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; CHECK-NEXT: [[A:%.*]] = icmp ne i32 [[X:%.*]], 0
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; CHECK-NEXT: [[B:%.*]] = icmp sgt i32 [[X]], -638208502
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; CHECK-NEXT: [[NOT_OR:%.*]] = and i1 [[A]], [[B]]
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; CHECK-NEXT: [[SEL:%.*]] = zext i1 [[NOT_OR]] to i32
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; CHECK-NEXT: ret i32 [[SEL]]
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;
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%A = icmp eq i32 %x, 0
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%B = icmp slt i32 %x, -638208501
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%or = or i1 %A, %B
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%sel = select i1 %or, i32 0, i32 1
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ret i32 %sel
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}
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define i32 @PR2844_logical(i32 %x) {
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; CHECK-LABEL: @PR2844_logical(
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; CHECK-NEXT: [[A:%.*]] = icmp ne i32 [[X:%.*]], 0
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; CHECK-NEXT: [[B:%.*]] = icmp sgt i32 [[X]], -638208502
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; CHECK-NEXT: [[NOT_OR:%.*]] = and i1 [[A]], [[B]]
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; CHECK-NEXT: [[SEL:%.*]] = zext i1 [[NOT_OR]] to i32
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; CHECK-NEXT: ret i32 [[SEL]]
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;
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%A = icmp eq i32 %x, 0
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%B = icmp slt i32 %x, -638208501
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%or = select i1 %A, i1 true, i1 %B
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%sel = select i1 %or, i32 0, i32 1
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ret i32 %sel
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}
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define i1 @test16(i32 %A) {
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; CHECK-LABEL: @test16(
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; CHECK-NEXT: ret i1 false
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;
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%B = and i32 %A, 5
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; Is never true
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%C = icmp eq i32 %B, 8
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ret i1 %C
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}
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define i1 @test17(i8 %A) {
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; CHECK-LABEL: @test17(
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; CHECK-NEXT: ret i1 false
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;
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%B = or i8 %A, 1
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; Always false
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%C = icmp eq i8 %B, 2
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ret i1 %C
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}
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define i1 @test18(i1 %C, i32 %a) {
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; CHECK-LABEL: @test18(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 [[C:%.*]], label [[ENDIF:%.*]], label [[ELSE:%.*]]
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; CHECK: else:
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; CHECK-NEXT: br label [[ENDIF]]
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; CHECK: endif:
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; CHECK-NEXT: ret i1 true
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;
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entry:
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br i1 %C, label %endif, label %else
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else:
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br label %endif
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endif:
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%b.0 = phi i32 [ 0, %entry ], [ 1, %else ]
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%tmp.4 = icmp slt i32 %b.0, 123
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ret i1 %tmp.4
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}
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define i1 @test19(i1 %A, i1 %B) {
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; CHECK-LABEL: @test19(
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; CHECK-NEXT: [[TMP1:%.*]] = xor i1 [[A:%.*]], [[B:%.*]]
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; CHECK-NEXT: [[C:%.*]] = xor i1 [[TMP1]], true
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; CHECK-NEXT: ret i1 [[C]]
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;
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%a = zext i1 %A to i32
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%b = zext i1 %B to i32
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%C = icmp eq i32 %a, %b
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ret i1 %C
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}
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define i32 @test20(i32 %A) {
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; CHECK-LABEL: @test20(
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; CHECK-NEXT: [[B:%.*]] = and i32 [[A:%.*]], 1
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; CHECK-NEXT: ret i32 [[B]]
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;
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%B = and i32 %A, 1
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%C = icmp ne i32 %B, 0
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%D = zext i1 %C to i32
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ret i32 %D
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}
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define <2 x i32> @test20vec(<2 x i32> %A) {
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; CHECK-LABEL: @test20vec(
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; CHECK-NEXT: [[D:%.*]] = and <2 x i32> [[A:%.*]], <i32 1, i32 1>
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; CHECK-NEXT: ret <2 x i32> [[D]]
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;
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%B = and <2 x i32> %A, <i32 1, i32 1>
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%C = icmp ne <2 x i32> %B, zeroinitializer
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%D = zext <2 x i1> %C to <2 x i32>
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ret <2 x i32> %D
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}
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define i32 @test21(i32 %a) {
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; CHECK-LABEL: @test21(
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; CHECK-NEXT: [[TMP_6:%.*]] = lshr i32 [[A:%.*]], 2
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; CHECK-NEXT: [[TMP_6_LOBIT:%.*]] = and i32 [[TMP_6]], 1
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; CHECK-NEXT: ret i32 [[TMP_6_LOBIT]]
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;
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%tmp.6 = and i32 %a, 4
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%not.tmp.7 = icmp ne i32 %tmp.6, 0
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%retval = zext i1 %not.tmp.7 to i32
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ret i32 %retval
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}
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define <2 x i32> @test21vec(<2 x i32> %a) {
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; CHECK-LABEL: @test21vec(
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; CHECK-NEXT: [[TMP_6:%.*]] = lshr <2 x i32> [[A:%.*]], <i32 2, i32 2>
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; CHECK-NEXT: [[TMP_6_LOBIT:%.*]] = and <2 x i32> [[TMP_6]], <i32 1, i32 1>
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; CHECK-NEXT: ret <2 x i32> [[TMP_6_LOBIT]]
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;
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%tmp.6 = and <2 x i32> %a, <i32 4, i32 4>
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%not.tmp.7 = icmp ne <2 x i32> %tmp.6, zeroinitializer
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%retval = zext <2 x i1> %not.tmp.7 to <2 x i32>
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ret <2 x i32> %retval
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}
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define i1 @test22(i32 %A, i32 %X) {
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; CHECK-LABEL: @test22(
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; CHECK-NEXT: ret i1 true
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;
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%B = and i32 %A, 100663295
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%C = icmp ult i32 %B, 268435456
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%Y = and i32 %X, 7
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%Z = icmp sgt i32 %Y, -1
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%R = or i1 %C, %Z
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ret i1 %R
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}
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define i1 @test22_logical(i32 %A, i32 %X) {
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; CHECK-LABEL: @test22_logical(
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; CHECK-NEXT: ret i1 true
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;
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%B = and i32 %A, 100663295
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%C = icmp ult i32 %B, 268435456
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%Y = and i32 %X, 7
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%Z = icmp sgt i32 %Y, -1
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%R = select i1 %C, i1 true, i1 %Z
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ret i1 %R
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}
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define i32 @test23(i32 %a) {
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; CHECK-LABEL: @test23(
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; CHECK-NEXT: [[TMP_1:%.*]] = and i32 [[A:%.*]], 1
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; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[TMP_1]], 1
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; CHECK-NEXT: ret i32 [[TMP1]]
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;
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%tmp.1 = and i32 %a, 1
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%tmp.2 = icmp eq i32 %tmp.1, 0
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%tmp.3 = zext i1 %tmp.2 to i32
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ret i32 %tmp.3
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}
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define <2 x i32> @test23vec(<2 x i32> %a) {
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; CHECK-LABEL: @test23vec(
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; CHECK-NEXT: [[TMP_1:%.*]] = and <2 x i32> [[A:%.*]], <i32 1, i32 1>
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; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i32> [[TMP_1]], <i32 1, i32 1>
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; CHECK-NEXT: ret <2 x i32> [[TMP1]]
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;
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%tmp.1 = and <2 x i32> %a, <i32 1, i32 1>
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%tmp.2 = icmp eq <2 x i32> %tmp.1, zeroinitializer
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%tmp.3 = zext <2 x i1> %tmp.2 to <2 x i32>
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ret <2 x i32> %tmp.3
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}
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define i32 @test24(i32 %a) {
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; CHECK-LABEL: @test24(
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; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 [[A:%.*]], 2
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; CHECK-NEXT: [[DOTLOBIT:%.*]] = and i32 [[TMP1]], 1
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; CHECK-NEXT: [[TMP2:%.*]] = xor i32 [[DOTLOBIT]], 1
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; CHECK-NEXT: ret i32 [[TMP2]]
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;
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%tmp1 = and i32 %a, 4
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%tmp.1 = lshr i32 %tmp1, 2
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%tmp.2 = icmp eq i32 %tmp.1, 0
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%tmp.3 = zext i1 %tmp.2 to i32
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ret i32 %tmp.3
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}
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define <2 x i32> @test24vec(<2 x i32> %a) {
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; CHECK-LABEL: @test24vec(
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; CHECK-NEXT: [[TMP1:%.*]] = lshr <2 x i32> [[A:%.*]], <i32 2, i32 2>
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; CHECK-NEXT: [[DOTLOBIT:%.*]] = and <2 x i32> [[TMP1]], <i32 1, i32 1>
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; CHECK-NEXT: [[TMP2:%.*]] = xor <2 x i32> [[DOTLOBIT]], <i32 1, i32 1>
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; CHECK-NEXT: ret <2 x i32> [[TMP2]]
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;
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%tmp1 = and <2 x i32> %a, <i32 4, i32 4>
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%tmp.1 = lshr <2 x i32> %tmp1, <i32 2, i32 2>
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%tmp.2 = icmp eq <2 x i32> %tmp.1, zeroinitializer
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%tmp.3 = zext <2 x i1> %tmp.2 to <2 x i32>
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ret <2 x i32> %tmp.3
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}
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define i1 @test25(i32 %A) {
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; CHECK-LABEL: @test25(
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; CHECK-NEXT: ret i1 false
|
|
;
|
|
%B = and i32 %A, 2
|
|
%C = icmp ugt i32 %B, 2
|
|
ret i1 %C
|
|
}
|
|
|