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47e77705f5
The structure of this fold is suspect vs. most of instcombine because it creates instructions and tries to delete them immediately after. If we don't have the operand types for the icmps, then we are not behaving as assumed. And as shown in PR49475, we can inf-loop.
169 lines
5.7 KiB
LLVM
169 lines
5.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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; Remove an icmp by using its operand in the subsequent logic directly.
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define i8 @zext_or_icmp_icmp(i8 %a, i8 %b) {
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; CHECK-LABEL: @zext_or_icmp_icmp(
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; CHECK-NEXT: [[MASK:%.*]] = and i8 [[A:%.*]], 1
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; CHECK-NEXT: [[TOBOOL2:%.*]] = icmp eq i8 [[B:%.*]], 0
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; CHECK-NEXT: [[TOBOOL22:%.*]] = zext i1 [[TOBOOL2]] to i8
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; CHECK-NEXT: [[TMP1:%.*]] = xor i8 [[MASK]], 1
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; CHECK-NEXT: [[ZEXT3:%.*]] = or i8 [[TMP1]], [[TOBOOL22]]
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; CHECK-NEXT: ret i8 [[ZEXT3]]
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;
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%mask = and i8 %a, 1
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%toBool1 = icmp eq i8 %mask, 0
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%toBool2 = icmp eq i8 %b, 0
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%bothCond = or i1 %toBool1, %toBool2
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%zext = zext i1 %bothCond to i8
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ret i8 %zext
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}
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define i8 @zext_or_icmp_icmp_logical(i8 %a, i8 %b) {
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; CHECK-LABEL: @zext_or_icmp_icmp_logical(
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; CHECK-NEXT: [[MASK:%.*]] = and i8 [[A:%.*]], 1
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; CHECK-NEXT: [[TOBOOL2:%.*]] = icmp eq i8 [[B:%.*]], 0
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; CHECK-NEXT: [[TOBOOL22:%.*]] = zext i1 [[TOBOOL2]] to i8
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; CHECK-NEXT: [[TMP1:%.*]] = xor i8 [[MASK]], 1
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; CHECK-NEXT: [[ZEXT3:%.*]] = or i8 [[TMP1]], [[TOBOOL22]]
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; CHECK-NEXT: ret i8 [[ZEXT3]]
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;
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%mask = and i8 %a, 1
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%toBool1 = icmp eq i8 %mask, 0
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%toBool2 = icmp eq i8 %b, 0
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%bothCond = select i1 %toBool1, i1 true, i1 %toBool2
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%zext = zext i1 %bothCond to i8
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ret i8 %zext
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}
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; Here, widening the or from i1 to i32 and removing one of the icmps would
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; widen an undef value (created by the out-of-range shift), increasing the
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; range of valid values for the return, so we can't do it.
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define i32 @dont_widen_undef() {
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; CHECK-LABEL: @dont_widen_undef(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[BLOCK2:%.*]]
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; CHECK: block1:
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; CHECK-NEXT: br label [[BLOCK2]]
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; CHECK: block2:
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; CHECK-NEXT: [[CMP_I:%.*]] = phi i1 [ false, [[BLOCK1:%.*]] ], [ true, [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[CMP115:%.*]] = phi i1 [ true, [[BLOCK1]] ], [ false, [[ENTRY]] ]
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; CHECK-NEXT: [[CMP1:%.*]] = or i1 [[CMP_I]], [[CMP115]]
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; CHECK-NEXT: [[CONV2:%.*]] = zext i1 [[CMP1]] to i32
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; CHECK-NEXT: ret i32 [[CONV2]]
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;
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entry:
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br label %block2
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block1:
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br label %block2
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block2:
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%m.011 = phi i32 [ 33, %entry ], [ 0, %block1 ]
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%cmp.i = icmp ugt i32 %m.011, 1
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%m.1.op = lshr i32 1, %m.011
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%sext.mask = and i32 %m.1.op, 65535
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%cmp115 = icmp ne i32 %sext.mask, 0
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%cmp1 = or i1 %cmp.i, %cmp115
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%conv2 = zext i1 %cmp1 to i32
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ret i32 %conv2
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}
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define i32 @dont_widen_undef_logical() {
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; CHECK-LABEL: @dont_widen_undef_logical(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[BLOCK2:%.*]]
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; CHECK: block1:
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; CHECK-NEXT: br label [[BLOCK2]]
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; CHECK: block2:
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; CHECK-NEXT: [[CMP_I:%.*]] = phi i1 [ false, [[BLOCK1:%.*]] ], [ true, [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[CMP115:%.*]] = phi i1 [ true, [[BLOCK1]] ], [ false, [[ENTRY]] ]
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; CHECK-NEXT: [[CMP1:%.*]] = or i1 [[CMP_I]], [[CMP115]]
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; CHECK-NEXT: [[CONV2:%.*]] = zext i1 [[CMP1]] to i32
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; CHECK-NEXT: ret i32 [[CONV2]]
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;
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entry:
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br label %block2
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block1:
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br label %block2
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block2:
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%m.011 = phi i32 [ 33, %entry ], [ 0, %block1 ]
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%cmp.i = icmp ugt i32 %m.011, 1
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%m.1.op = lshr i32 1, %m.011
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%sext.mask = and i32 %m.1.op, 65535
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%cmp115 = icmp ne i32 %sext.mask, 0
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%cmp1 = select i1 %cmp.i, i1 true, i1 %cmp115
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%conv2 = zext i1 %cmp1 to i32
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ret i32 %conv2
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}
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; This should not end with more instructions than it started from.
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define i32 @PR49475(i32 %x, i16 %y) {
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; CHECK-LABEL: @PR49475(
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; CHECK-NEXT: [[M:%.*]] = and i16 [[Y:%.*]], 1
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; CHECK-NEXT: [[B1:%.*]] = icmp eq i32 [[X:%.*]], 0
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; CHECK-NEXT: [[B2:%.*]] = icmp eq i16 [[M]], 0
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; CHECK-NEXT: [[T1:%.*]] = or i1 [[B1]], [[B2]]
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; CHECK-NEXT: [[Z:%.*]] = zext i1 [[T1]] to i32
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; CHECK-NEXT: ret i32 [[Z]]
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;
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%m = and i16 %y, 1
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%b1 = icmp eq i32 %x, 0
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%b2 = icmp eq i16 %m, 0
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%t1 = or i1 %b1, %b2
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%z = zext i1 %t1 to i32
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ret i32 %z
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}
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; This would infinite-loop.
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define i8 @PR49475_infloop(i32 %t0, i16 %insert, i64 %e, i8 %i162) {
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; CHECK-LABEL: @PR49475_infloop(
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; CHECK-NEXT: [[B:%.*]] = icmp eq i32 [[T0:%.*]], 0
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; CHECK-NEXT: [[B2:%.*]] = icmp eq i16 [[INSERT:%.*]], 0
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; CHECK-NEXT: [[T1:%.*]] = or i1 [[B]], [[B2]]
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; CHECK-NEXT: [[EXT:%.*]] = zext i1 [[T1]] to i32
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[EXT]], [[T0]]
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; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[AND]], 140
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; CHECK-NEXT: [[XOR1:%.*]] = zext i32 [[TMP1]] to i64
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; CHECK-NEXT: [[CONV16:%.*]] = sext i8 [[I162:%.*]] to i64
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; CHECK-NEXT: [[SUB17:%.*]] = sub i64 [[CONV16]], [[E:%.*]]
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; CHECK-NEXT: [[SEXT:%.*]] = shl i64 [[SUB17]], 32
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; CHECK-NEXT: [[CONV18:%.*]] = ashr exact i64 [[SEXT]], 32
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; CHECK-NEXT: [[CMP:%.*]] = icmp sle i64 [[CONV18]], [[XOR1]]
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; CHECK-NEXT: [[CONV19:%.*]] = zext i1 [[CMP]] to i16
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; CHECK-NEXT: [[OR21:%.*]] = or i16 [[CONV19]], [[INSERT]]
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; CHECK-NEXT: [[TRUNC44:%.*]] = trunc i16 [[OR21]] to i8
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; CHECK-NEXT: [[INC:%.*]] = or i8 [[TRUNC44]], [[I162]]
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; CHECK-NEXT: [[TOBOOL23_NOT:%.*]] = icmp eq i16 [[OR21]], 0
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; CHECK-NEXT: call void @llvm.assume(i1 [[TOBOOL23_NOT]])
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; CHECK-NEXT: ret i8 [[INC]]
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;
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%b = icmp eq i32 %t0, 0
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%b2 = icmp eq i16 %insert, 0
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%t1 = or i1 %b, %b2
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%ext = zext i1 %t1 to i32
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%and = and i32 %t0, %ext
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%conv13 = zext i32 %and to i64
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%xor = xor i64 %conv13, 140
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%conv16 = sext i8 %i162 to i64
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%sub17 = sub i64 %conv16, %e
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%sext = shl i64 %sub17, 32
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%conv18 = ashr exact i64 %sext, 32
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%cmp = icmp sge i64 %xor, %conv18
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%conv19 = zext i1 %cmp to i16
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%or21 = or i16 %insert, %conv19
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%trunc44 = trunc i16 %or21 to i8
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%inc = add i8 %i162, %trunc44
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%tobool23.not = icmp eq i16 %or21, 0
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call void @llvm.assume(i1 %tobool23.not)
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ret i8 %inc
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}
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declare void @llvm.assume(i1 noundef)
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